/*
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* Copyright (C) 2013, Intel Corporation
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: Intel
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*/
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#ifndef _FSP_HEADER_H_
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#define _FSP_HEADER_H_
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#define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */
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struct __packed fsp_header {
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u32 sign; /* 'FSPH' */
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u32 hdr_len; /* header length */
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u8 reserved1[3];
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u8 hdr_rev; /* header rev */
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u32 img_rev; /* image rev */
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char img_id[8]; /* signature string */
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u32 img_size; /* image size */
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u32 img_base; /* image base */
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u32 img_attr; /* image attribute */
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u32 cfg_region_off; /* configuration region offset */
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u32 cfg_region_size; /* configuration region size */
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u32 api_num; /* number of API entries */
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u32 fsp_tempram_init; /* tempram_init offset */
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u32 fsp_init; /* fsp_init offset */
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u32 fsp_notify; /* fsp_notify offset */
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u32 reserved2;
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};
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#endif
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