/*
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* Copyright (C) 2014 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _NIC301_REGISTERS_H_
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#define _NIC301_REGISTERS_H_
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struct nic301_registers {
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u32 remap; /* 0x0 */
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/* Security Register Group */
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u32 _pad_0x4_0x8[1];
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u32 l4main;
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u32 l4sp;
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u32 l4mp; /* 0x10 */
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u32 l4osc1;
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u32 l4spim;
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u32 stm;
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u32 lwhps2fpgaregs; /* 0x20 */
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u32 _pad_0x24_0x28[1];
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u32 usb1;
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u32 nanddata;
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u32 _pad_0x30_0x80[20];
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u32 usb0; /* 0x80 */
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u32 nandregs;
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u32 qspidata;
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u32 fpgamgrdata;
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u32 hps2fpgaregs; /* 0x90 */
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u32 acp;
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u32 rom;
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u32 ocram;
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u32 sdrdata; /* 0xA0 */
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u32 _pad_0xa4_0x1fd0[1995];
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/* ID Register Group */
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u32 periph_id_4; /* 0x1FD0 */
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u32 _pad_0x1fd4_0x1fe0[3];
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u32 periph_id_0; /* 0x1FE0 */
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u32 periph_id_1;
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u32 periph_id_2;
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u32 periph_id_3;
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u32 comp_id_0; /* 0x1FF0 */
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u32 comp_id_1;
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u32 comp_id_2;
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u32 comp_id_3;
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u32 _pad_0x2000_0x2008[2];
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/* L4 MAIN */
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u32 l4main_fn_mod_bm_iss;
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u32 _pad_0x200c_0x3008[1023];
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/* L4 SP */
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u32 l4sp_fn_mod_bm_iss;
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u32 _pad_0x300c_0x4008[1023];
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/* L4 MP */
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u32 l4mp_fn_mod_bm_iss;
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u32 _pad_0x400c_0x5008[1023];
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/* L4 OSC1 */
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u32 l4osc_fn_mod_bm_iss;
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u32 _pad_0x500c_0x6008[1023];
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/* L4 SPIM */
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u32 l4spim_fn_mod_bm_iss;
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u32 _pad_0x600c_0x7008[1023];
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/* STM */
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u32 stm_fn_mod_bm_iss;
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u32 _pad_0x700c_0x7108[63];
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u32 stm_fn_mod;
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u32 _pad_0x710c_0x8008[959];
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/* LWHPS2FPGA */
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u32 lwhps2fpga_fn_mod_bm_iss;
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u32 _pad_0x800c_0x8108[63];
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u32 lwhps2fpga_fn_mod;
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u32 _pad_0x810c_0xa008[1983];
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/* USB1 */
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u32 usb1_fn_mod_bm_iss;
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u32 _pad_0xa00c_0xa044[14];
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u32 usb1_ahb_cntl;
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u32 _pad_0xa048_0xb008[1008];
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/* NANDDATA */
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u32 nanddata_fn_mod_bm_iss;
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u32 _pad_0xb00c_0xb108[63];
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u32 nanddata_fn_mod;
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u32 _pad_0xb10c_0x20008[21439];
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/* USB0 */
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u32 usb0_fn_mod_bm_iss;
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u32 _pad_0x2000c_0x20044[14];
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u32 usb0_ahb_cntl;
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u32 _pad_0x20048_0x21008[1008];
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/* NANDREGS */
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u32 nandregs_fn_mod_bm_iss;
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u32 _pad_0x2100c_0x21108[63];
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u32 nandregs_fn_mod;
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u32 _pad_0x2110c_0x22008[959];
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/* QSPIDATA */
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u32 qspidata_fn_mod_bm_iss;
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u32 _pad_0x2200c_0x22044[14];
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u32 qspidata_ahb_cntl;
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u32 _pad_0x22048_0x23008[1008];
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/* FPGAMGRDATA */
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u32 fpgamgrdata_fn_mod_bm_iss;
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u32 _pad_0x2300c_0x23040[13];
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u32 fpgamgrdata_wr_tidemark; /* 0x23040 */
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u32 _pad_0x23044_0x23108[49];
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u32 fn_mod;
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u32 _pad_0x2310c_0x24008[959];
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/* HPS2FPGA */
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u32 hps2fpga_fn_mod_bm_iss;
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u32 _pad_0x2400c_0x24040[13];
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u32 hps2fpga_wr_tidemark; /* 0x24040 */
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u32 _pad_0x24044_0x24108[49];
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u32 hps2fpga_fn_mod;
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u32 _pad_0x2410c_0x25008[959];
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/* ACP */
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u32 acp_fn_mod_bm_iss;
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u32 _pad_0x2500c_0x25108[63];
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u32 acp_fn_mod;
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u32 _pad_0x2510c_0x26008[959];
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/* Boot ROM */
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u32 bootrom_fn_mod_bm_iss;
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u32 _pad_0x2600c_0x26108[63];
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u32 bootrom_fn_mod;
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u32 _pad_0x2610c_0x27008[959];
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/* On-chip RAM */
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u32 ocram_fn_mod_bm_iss;
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u32 _pad_0x2700c_0x27040[13];
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u32 ocram_wr_tidemark; /* 0x27040 */
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u32 _pad_0x27044_0x27108[49];
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u32 ocram_fn_mod;
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u32 _pad_0x2710c_0x42024[27590];
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/* DAP */
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u32 dap_fn_mod2;
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u32 dap_fn_mod_ahb;
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u32 _pad_0x4202c_0x42100[53];
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u32 dap_read_qos; /* 0x42100 */
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u32 dap_write_qos;
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u32 dap_fn_mod;
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u32 _pad_0x4210c_0x43100[1021];
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/* MPU */
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u32 mpu_read_qos; /* 0x43100 */
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u32 mpu_write_qos;
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u32 mpu_fn_mod;
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u32 _pad_0x4310c_0x44028[967];
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/* SDMMC */
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u32 sdmmc_fn_mod_ahb;
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u32 _pad_0x4402c_0x44100[53];
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u32 sdmmc_read_qos; /* 0x44100 */
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u32 sdmmc_write_qos;
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u32 sdmmc_fn_mod;
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u32 _pad_0x4410c_0x45100[1021];
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/* DMA */
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u32 dma_read_qos; /* 0x45100 */
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u32 dma_write_qos;
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u32 dma_fn_mod;
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u32 _pad_0x4510c_0x46040[973];
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/* FPGA2HPS */
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u32 fpga2hps_wr_tidemark; /* 0x46040 */
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u32 _pad_0x46044_0x46100[47];
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u32 fpga2hps_read_qos; /* 0x46100 */
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u32 fpga2hps_write_qos;
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u32 fpga2hps_fn_mod;
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u32 _pad_0x4610c_0x47100[1021];
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/* ETR */
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u32 etr_read_qos; /* 0x47100 */
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u32 etr_write_qos;
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u32 etr_fn_mod;
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u32 _pad_0x4710c_0x48100[1021];
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/* EMAC0 */
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u32 emac0_read_qos; /* 0x48100 */
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u32 emac0_write_qos;
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u32 emac0_fn_mod;
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u32 _pad_0x4810c_0x49100[1021];
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/* EMAC1 */
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u32 emac1_read_qos; /* 0x49100 */
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u32 emac1_write_qos;
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u32 emac1_fn_mod;
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u32 _pad_0x4910c_0x4a028[967];
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/* USB0 */
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u32 usb0_fn_mod_ahb;
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u32 _pad_0x4a02c_0x4a100[53];
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u32 usb0_read_qos; /* 0x4A100 */
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u32 usb0_write_qos;
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u32 usb0_fn_mod;
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u32 _pad_0x4a10c_0x4b100[1021];
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/* NAND */
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u32 nand_read_qos; /* 0x4B100 */
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u32 nand_write_qos;
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u32 nand_fn_mod;
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u32 _pad_0x4b10c_0x4c028[967];
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/* USB1 */
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u32 usb1_fn_mod_ahb;
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u32 _pad_0x4c02c_0x4c100[53];
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u32 usb1_read_qos; /* 0x4C100 */
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u32 usb1_write_qos;
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u32 usb1_fn_mod;
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};
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#endif /* _NIC301_REGISTERS_H_ */
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