/* SPDX-License-Identifier: GPL-2.0 */
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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******************************************************************************/
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#ifndef __ODMDIG_H__
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#define __ODMDIG_H__
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typedef struct _Dynamic_Initial_Gain_Threshold_ {
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bool bStopDIG;
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bool bPSDInProgress;
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u8 Dig_Enable_Flag;
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u8 Dig_Ext_Port_Stage;
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int RssiLowThresh;
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int RssiHighThresh;
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u32 FALowThresh;
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u32 FAHighThresh;
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u8 CurSTAConnectState;
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u8 PreSTAConnectState;
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u8 CurMultiSTAConnectState;
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u8 PreIGValue;
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u8 CurIGValue;
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u8 BackupIGValue; /* MP DIG */
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u8 BT30_CurIGI;
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u8 IGIBackup;
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s8 BackoffVal;
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s8 BackoffVal_range_max;
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s8 BackoffVal_range_min;
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u8 rx_gain_range_max;
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u8 rx_gain_range_min;
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u8 Rssi_val_min;
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u8 PreCCK_CCAThres;
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u8 CurCCK_CCAThres;
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u8 PreCCKPDState;
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u8 CurCCKPDState;
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u8 CCKPDBackup;
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u8 LargeFAHit;
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u8 ForbiddenIGI;
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u32 Recover_cnt;
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u8 DIG_Dynamic_MIN_0;
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u8 DIG_Dynamic_MIN_1;
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bool bMediaConnect_0;
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bool bMediaConnect_1;
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u32 AntDiv_RSSI_max;
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u32 RSSI_max;
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u8 *pbP2pLinkInProgress;
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} DIG_T, *pDIG_T;
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typedef struct false_ALARM_STATISTICS {
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u32 Cnt_Parity_Fail;
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u32 Cnt_Rate_Illegal;
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u32 Cnt_Crc8_fail;
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u32 Cnt_Mcs_fail;
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u32 Cnt_Ofdm_fail;
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u32 Cnt_Ofdm_fail_pre; /* For RTL8881A */
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u32 Cnt_Cck_fail;
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u32 Cnt_all;
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u32 Cnt_Fast_Fsync;
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u32 Cnt_SB_Search_fail;
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u32 Cnt_OFDM_CCA;
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u32 Cnt_CCK_CCA;
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u32 Cnt_CCA_all;
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u32 Cnt_BW_USC; /* Gary */
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u32 Cnt_BW_LSC; /* Gary */
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} false_ALARM_STATISTICS, *Pfalse_ALARM_STATISTICS;
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typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition {
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DIG_TYPE_THRESH_HIGH = 0,
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DIG_TYPE_THRESH_LOW = 1,
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DIG_TYPE_BACKOFF = 2,
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DIG_TYPE_RX_GAIN_MIN = 3,
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DIG_TYPE_RX_GAIN_MAX = 4,
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DIG_TYPE_ENABLE = 5,
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DIG_TYPE_DISABLE = 6,
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DIG_OP_TYPE_MAX
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} DM_DIG_OP_E;
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typedef enum tag_ODM_PauseDIG_Type {
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ODM_PAUSE_DIG = BIT0,
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ODM_RESUME_DIG = BIT1
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} ODM_Pause_DIG_TYPE;
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typedef enum tag_ODM_PauseCCKPD_Type {
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ODM_PAUSE_CCKPD = BIT0,
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ODM_RESUME_CCKPD = BIT1
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} ODM_Pause_CCKPD_TYPE;
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#define DM_DIG_THRESH_HIGH 40
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#define DM_DIG_THRESH_LOW 35
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#define DMfalseALARM_THRESH_LOW 400
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#define DMfalseALARM_THRESH_HIGH 1000
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#define DM_DIG_MAX_NIC 0x3e
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#define DM_DIG_MIN_NIC 0x1e /* 0x22//0x1c */
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#define DM_DIG_MAX_OF_MIN_NIC 0x3e
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#define DM_DIG_MAX_AP 0x3e
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#define DM_DIG_MIN_AP 0x1c
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#define DM_DIG_MAX_OF_MIN 0x2A /* 0x32 */
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#define DM_DIG_MIN_AP_DFS 0x20
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#define DM_DIG_MAX_NIC_HP 0x46
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#define DM_DIG_MIN_NIC_HP 0x2e
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#define DM_DIG_MAX_AP_HP 0x42
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#define DM_DIG_MIN_AP_HP 0x30
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#define DM_DIG_FA_TH0 0x200/* 0x20 */
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#define DM_DIG_FA_TH1 0x300
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#define DM_DIG_FA_TH2 0x400
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/* this is for 92d */
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#define DM_DIG_FA_TH0_92D 0x100
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#define DM_DIG_FA_TH1_92D 0x400
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#define DM_DIG_FA_TH2_92D 0x600
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#define DM_DIG_BACKOFF_MAX 12
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#define DM_DIG_BACKOFF_MIN -4
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#define DM_DIG_BACKOFF_DEFAULT 10
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#define DM_DIG_FA_TH0_LPS 4 /* 4 in lps */
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#define DM_DIG_FA_TH1_LPS 15 /* 15 lps */
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#define DM_DIG_FA_TH2_LPS 30 /* 30 lps */
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#define RSSI_OFFSET_DIG 0x05
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void odm_NHMCounterStatisticsInit(void *pDM_VOID);
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void odm_NHMCounterStatistics(void *pDM_VOID);
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void odm_NHMBBInit(void *pDM_VOID);
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void odm_NHMBB(void *pDM_VOID);
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void odm_NHMCounterStatisticsReset(void *pDM_VOID);
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void odm_GetNHMCounterStatistics(void *pDM_VOID);
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void odm_SearchPwdBLowerBound(void *pDM_VOID, u8 IGI_target);
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void odm_AdaptivityInit(void *pDM_VOID);
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void odm_Adaptivity(void *pDM_VOID, u8 IGI);
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void ODM_Write_DIG(void *pDM_VOID, u8 CurrentIGI);
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void odm_PauseDIG(void *pDM_VOID, ODM_Pause_DIG_TYPE PauseType, u8 IGIValue);
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void odm_DIGInit(void *pDM_VOID);
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void odm_DIG(void *pDM_VOID);
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void odm_DIGbyRSSI_LPS(void *pDM_VOID);
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void odm_FalseAlarmCounterStatistics(void *pDM_VOID);
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void odm_FAThresholdCheck(
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void *pDM_VOID,
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bool bDFSBand,
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bool bPerformance,
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u32 RxTp,
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u32 TxTp,
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u32 *dm_FA_thres
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);
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u8 odm_ForbiddenIGICheck(void *pDM_VOID, u8 DIG_Dynamic_MIN, u8 CurrentIGI);
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bool odm_DigAbort(void *pDM_VOID);
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void odm_CCKPacketDetectionThresh(void *pDM_VOID);
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void ODM_Write_CCK_CCA_Thres(void *pDM_VOID, u8 CurCCK_CCAThres);
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#endif
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