/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* TI OMAP4 ISS V4L2 Driver
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*
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* Copyright (C) 2012 Texas Instruments.
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*
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* Author: Sergio Aguirre <sergio.a.aguirre@gmail.com>
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*/
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#ifndef _OMAP4_ISS_H_
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#define _OMAP4_ISS_H_
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#include <media/v4l2-device.h>
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#include <media/v4l2-mc.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/wait.h>
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#include <linux/platform_data/media/omap4iss.h>
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#include "iss_regs.h"
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#include "iss_csiphy.h"
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#include "iss_csi2.h"
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#include "iss_ipipeif.h"
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#include "iss_ipipe.h"
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#include "iss_resizer.h"
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struct regmap;
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#define to_iss_device(ptr_module) \
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container_of(ptr_module, struct iss_device, ptr_module)
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#define to_device(ptr_module) \
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(to_iss_device(ptr_module)->dev)
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enum iss_mem_resources {
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OMAP4_ISS_MEM_TOP,
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OMAP4_ISS_MEM_CSI2_A_REGS1,
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OMAP4_ISS_MEM_CAMERARX_CORE1,
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OMAP4_ISS_MEM_CSI2_B_REGS1,
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OMAP4_ISS_MEM_CAMERARX_CORE2,
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OMAP4_ISS_MEM_BTE,
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OMAP4_ISS_MEM_ISP_SYS1,
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OMAP4_ISS_MEM_ISP_RESIZER,
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OMAP4_ISS_MEM_ISP_IPIPE,
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OMAP4_ISS_MEM_ISP_ISIF,
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OMAP4_ISS_MEM_ISP_IPIPEIF,
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OMAP4_ISS_MEM_LAST,
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};
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enum iss_subclk_resource {
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OMAP4_ISS_SUBCLK_SIMCOP = (1 << 0),
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OMAP4_ISS_SUBCLK_ISP = (1 << 1),
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OMAP4_ISS_SUBCLK_CSI2_A = (1 << 2),
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OMAP4_ISS_SUBCLK_CSI2_B = (1 << 3),
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OMAP4_ISS_SUBCLK_CCP2 = (1 << 4),
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};
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enum iss_isp_subclk_resource {
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OMAP4_ISS_ISP_SUBCLK_BL = (1 << 0),
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OMAP4_ISS_ISP_SUBCLK_ISIF = (1 << 1),
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OMAP4_ISS_ISP_SUBCLK_H3A = (1 << 2),
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OMAP4_ISS_ISP_SUBCLK_RSZ = (1 << 3),
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OMAP4_ISS_ISP_SUBCLK_IPIPE = (1 << 4),
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OMAP4_ISS_ISP_SUBCLK_IPIPEIF = (1 << 5),
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};
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/*
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* struct iss_reg - Structure for ISS register values.
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* @reg: 32-bit Register address.
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* @val: 32-bit Register value.
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*/
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struct iss_reg {
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enum iss_mem_resources mmio_range;
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u32 reg;
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u32 val;
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};
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/*
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* struct iss_device - ISS device structure.
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* @syscon: Regmap for the syscon register space
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* @crashed: Crashed entities
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*/
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struct iss_device {
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struct v4l2_device v4l2_dev;
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struct media_device media_dev;
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struct device *dev;
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u32 revision;
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/* platform HW resources */
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struct iss_platform_data *pdata;
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unsigned int irq_num;
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struct resource *res[OMAP4_ISS_MEM_LAST];
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void __iomem *regs[OMAP4_ISS_MEM_LAST];
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struct regmap *syscon;
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u64 raw_dmamask;
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struct mutex iss_mutex; /* For handling ref_count field */
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struct media_entity_enum crashed;
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int has_context;
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int ref_count;
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struct clk *iss_fck;
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struct clk *iss_ctrlclk;
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/* ISS modules */
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struct iss_csi2_device csi2a;
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struct iss_csi2_device csi2b;
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struct iss_csiphy csiphy1;
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struct iss_csiphy csiphy2;
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struct iss_ipipeif_device ipipeif;
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struct iss_ipipe_device ipipe;
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struct iss_resizer_device resizer;
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unsigned int subclk_resources;
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unsigned int isp_subclk_resources;
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};
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#define v4l2_dev_to_iss_device(dev) \
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container_of(dev, struct iss_device, v4l2_dev)
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int omap4iss_get_external_info(struct iss_pipeline *pipe,
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struct media_link *link);
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int omap4iss_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
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atomic_t *stopping);
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int omap4iss_module_sync_is_stopping(wait_queue_head_t *wait,
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atomic_t *stopping);
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int omap4iss_pipeline_set_stream(struct iss_pipeline *pipe,
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enum iss_pipeline_stream_state state);
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void omap4iss_pipeline_cancel_stream(struct iss_pipeline *pipe);
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void omap4iss_configure_bridge(struct iss_device *iss,
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enum ipipeif_input_entity input);
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struct iss_device *omap4iss_get(struct iss_device *iss);
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void omap4iss_put(struct iss_device *iss);
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int omap4iss_subclk_enable(struct iss_device *iss,
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enum iss_subclk_resource res);
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int omap4iss_subclk_disable(struct iss_device *iss,
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enum iss_subclk_resource res);
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void omap4iss_isp_subclk_enable(struct iss_device *iss,
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enum iss_isp_subclk_resource res);
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void omap4iss_isp_subclk_disable(struct iss_device *iss,
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enum iss_isp_subclk_resource res);
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int omap4iss_register_entities(struct platform_device *pdev,
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struct v4l2_device *v4l2_dev);
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void omap4iss_unregister_entities(struct platform_device *pdev);
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/*
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* iss_reg_read - Read the value of an OMAP4 ISS register
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* @iss: the ISS device
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* @res: memory resource in which the register is located
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* @offset: register offset in the memory resource
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*
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* Return the register value.
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*/
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static inline
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u32 iss_reg_read(struct iss_device *iss, enum iss_mem_resources res,
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u32 offset)
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{
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return readl(iss->regs[res] + offset);
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}
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/*
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* iss_reg_write - Write a value to an OMAP4 ISS register
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* @iss: the ISS device
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* @res: memory resource in which the register is located
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* @offset: register offset in the memory resource
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* @value: value to be written
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*/
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static inline
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void iss_reg_write(struct iss_device *iss, enum iss_mem_resources res,
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u32 offset, u32 value)
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{
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writel(value, iss->regs[res] + offset);
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}
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/*
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* iss_reg_clr - Clear bits in an OMAP4 ISS register
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* @iss: the ISS device
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* @res: memory resource in which the register is located
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* @offset: register offset in the memory resource
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* @clr: bit mask to be cleared
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*/
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static inline
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void iss_reg_clr(struct iss_device *iss, enum iss_mem_resources res,
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u32 offset, u32 clr)
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{
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u32 v = iss_reg_read(iss, res, offset);
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iss_reg_write(iss, res, offset, v & ~clr);
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}
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/*
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* iss_reg_set - Set bits in an OMAP4 ISS register
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* @iss: the ISS device
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* @res: memory resource in which the register is located
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* @offset: register offset in the memory resource
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* @set: bit mask to be set
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*/
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static inline
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void iss_reg_set(struct iss_device *iss, enum iss_mem_resources res,
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u32 offset, u32 set)
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{
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u32 v = iss_reg_read(iss, res, offset);
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iss_reg_write(iss, res, offset, v | set);
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}
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/*
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* iss_reg_update - Clear and set bits in an OMAP4 ISS register
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* @iss: the ISS device
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* @res: memory resource in which the register is located
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* @offset: register offset in the memory resource
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* @clr: bit mask to be cleared
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* @set: bit mask to be set
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*
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* Clear the clr mask first and then set the set mask.
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*/
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static inline
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void iss_reg_update(struct iss_device *iss, enum iss_mem_resources res,
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u32 offset, u32 clr, u32 set)
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{
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u32 v = iss_reg_read(iss, res, offset);
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iss_reg_write(iss, res, offset, (v & ~clr) | set);
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}
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#define iss_poll_condition_timeout(cond, timeout, min_ival, max_ival) \
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({ \
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unsigned long __timeout = jiffies + usecs_to_jiffies(timeout); \
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unsigned int __min_ival = (min_ival); \
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unsigned int __max_ival = (max_ival); \
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bool __cond; \
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while (!(__cond = (cond))) { \
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if (time_after(jiffies, __timeout)) \
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break; \
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usleep_range(__min_ival, __max_ival); \
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} \
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!__cond; \
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})
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#endif /* _OMAP4_ISS_H_ */
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