// SPDX-License-Identifier: GPL-2.0+
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/*
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* FB driver for the SSD1306 OLED Controller
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*
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* Copyright (C) 2013 Noralf Tronnes
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/gpio/consumer.h>
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#include <linux/delay.h>
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#include "fbtft.h"
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#define DRVNAME "fb_ssd1306"
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#define WIDTH 128
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#define HEIGHT 64
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/*
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* write_reg() caveat:
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*
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* This doesn't work because D/C has to be LOW for both values:
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* write_reg(par, val1, val2);
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*
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* Do it like this:
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* write_reg(par, val1);
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* write_reg(par, val2);
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*/
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/* Init sequence taken from the Adafruit SSD1306 Arduino library */
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static int init_display(struct fbtft_par *par)
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{
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par->fbtftops.reset(par);
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if (par->gamma.curves[0] == 0) {
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mutex_lock(&par->gamma.lock);
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if (par->info->var.yres == 64)
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par->gamma.curves[0] = 0xCF;
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else
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par->gamma.curves[0] = 0x8F;
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mutex_unlock(&par->gamma.lock);
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}
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/* Set Display OFF */
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write_reg(par, 0xAE);
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/* Set Display Clock Divide Ratio/ Oscillator Frequency */
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write_reg(par, 0xD5);
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write_reg(par, 0x80);
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/* Set Multiplex Ratio */
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write_reg(par, 0xA8);
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if (par->info->var.yres == 64)
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write_reg(par, 0x3F);
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else if (par->info->var.yres == 48)
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write_reg(par, 0x2F);
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else
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write_reg(par, 0x1F);
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/* Set Display Offset */
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write_reg(par, 0xD3);
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write_reg(par, 0x0);
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/* Set Display Start Line */
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write_reg(par, 0x40 | 0x0);
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/* Charge Pump Setting */
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write_reg(par, 0x8D);
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/* A[2] = 1b, Enable charge pump during display on */
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write_reg(par, 0x14);
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/* Set Memory Addressing Mode */
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write_reg(par, 0x20);
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/* Vertical addressing mode */
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write_reg(par, 0x01);
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/* Set Segment Re-map */
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/* column address 127 is mapped to SEG0 */
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write_reg(par, 0xA0 | 0x1);
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/* Set COM Output Scan Direction */
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/* remapped mode. Scan from COM[N-1] to COM0 */
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write_reg(par, 0xC8);
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/* Set COM Pins Hardware Configuration */
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write_reg(par, 0xDA);
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if (par->info->var.yres == 64)
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/* A[4]=1b, Alternative COM pin configuration */
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write_reg(par, 0x12);
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else if (par->info->var.yres == 48)
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/* A[4]=1b, Alternative COM pin configuration */
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write_reg(par, 0x12);
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else
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/* A[4]=0b, Sequential COM pin configuration */
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write_reg(par, 0x02);
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/* Set Pre-charge Period */
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write_reg(par, 0xD9);
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write_reg(par, 0xF1);
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/* Set VCOMH Deselect Level */
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write_reg(par, 0xDB);
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/* according to the datasheet, this value is out of bounds */
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write_reg(par, 0x40);
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/* Entire Display ON */
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/* Resume to RAM content display. Output follows RAM content */
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write_reg(par, 0xA4);
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/* Set Normal Display
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* 0 in RAM: OFF in display panel
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* 1 in RAM: ON in display panel
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*/
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write_reg(par, 0xA6);
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/* Set Display ON */
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write_reg(par, 0xAF);
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return 0;
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}
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static void set_addr_win_64x48(struct fbtft_par *par)
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{
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/* Set Column Address */
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write_reg(par, 0x21);
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write_reg(par, 0x20);
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write_reg(par, 0x5F);
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/* Set Page Address */
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write_reg(par, 0x22);
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write_reg(par, 0x0);
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write_reg(par, 0x5);
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}
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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/* Set Lower Column Start Address for Page Addressing Mode */
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write_reg(par, 0x00 | 0x0);
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/* Set Higher Column Start Address for Page Addressing Mode */
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write_reg(par, 0x10 | 0x0);
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/* Set Display Start Line */
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write_reg(par, 0x40 | 0x0);
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if (par->info->var.xres == 64 && par->info->var.yres == 48)
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set_addr_win_64x48(par);
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}
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static int blank(struct fbtft_par *par, bool on)
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{
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fbtft_par_dbg(DEBUG_BLANK, par, "(%s=%s)\n",
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__func__, on ? "true" : "false");
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if (on)
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write_reg(par, 0xAE);
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else
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write_reg(par, 0xAF);
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return 0;
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}
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/* Gamma is used to control Contrast */
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static int set_gamma(struct fbtft_par *par, u32 *curves)
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{
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/* apply mask */
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curves[0] &= 0xFF;
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/* Set Contrast Control for BANK0 */
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write_reg(par, 0x81);
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write_reg(par, curves[0]);
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return 0;
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}
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static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
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{
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u16 *vmem16 = (u16 *)par->info->screen_buffer;
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u32 xres = par->info->var.xres;
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u32 yres = par->info->var.yres;
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u8 *buf = par->txbuf.buf;
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int x, y, i;
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int ret = 0;
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for (x = 0; x < xres; x++) {
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for (y = 0; y < yres / 8; y++) {
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*buf = 0x00;
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for (i = 0; i < 8; i++)
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if (vmem16[(y * 8 + i) * xres + x])
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*buf |= BIT(i);
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buf++;
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}
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}
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/* Write data */
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gpiod_set_value(par->gpio.dc, 1);
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ret = par->fbtftops.write(par, par->txbuf.buf, xres * yres / 8);
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if (ret < 0)
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dev_err(par->info->device, "write failed and returned: %d\n",
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ret);
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return ret;
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}
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static struct fbtft_display display = {
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.regwidth = 8,
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.width = WIDTH,
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.height = HEIGHT,
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.gamma_num = 1,
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.gamma_len = 1,
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.gamma = "00",
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.fbtftops = {
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.write_vmem = write_vmem,
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.init_display = init_display,
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.set_addr_win = set_addr_win,
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.blank = blank,
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.set_gamma = set_gamma,
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},
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};
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FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1306", &display);
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MODULE_ALIAS("spi:" DRVNAME);
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MODULE_ALIAS("platform:" DRVNAME);
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MODULE_ALIAS("spi:ssd1306");
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MODULE_ALIAS("platform:ssd1306");
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MODULE_DESCRIPTION("SSD1306 OLED Driver");
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MODULE_AUTHOR("Noralf Tronnes");
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MODULE_LICENSE("GPL");
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