/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef P54PCI_H
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#define P54PCI_H
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#include <linux/interrupt.h>
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/*
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* Defines for PCI based mac80211 Prism54 driver
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*
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* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
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*
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* Based on the islsm (softmac prism54) driver, which is:
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* Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
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*/
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/* Device Interrupt register bits */
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#define ISL38XX_DEV_INT_RESET 0x0001
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#define ISL38XX_DEV_INT_UPDATE 0x0002
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#define ISL38XX_DEV_INT_WAKEUP 0x0008
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#define ISL38XX_DEV_INT_SLEEP 0x0010
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#define ISL38XX_DEV_INT_ABORT 0x0020
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/* these two only used in USB */
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#define ISL38XX_DEV_INT_DATA 0x0040
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#define ISL38XX_DEV_INT_MGMT 0x0080
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#define ISL38XX_DEV_INT_PCIUART_CTS 0x4000
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#define ISL38XX_DEV_INT_PCIUART_DR 0x8000
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/* Interrupt Identification/Acknowledge/Enable register bits */
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#define ISL38XX_INT_IDENT_UPDATE 0x0002
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#define ISL38XX_INT_IDENT_INIT 0x0004
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#define ISL38XX_INT_IDENT_WAKEUP 0x0008
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#define ISL38XX_INT_IDENT_SLEEP 0x0010
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#define ISL38XX_INT_IDENT_PCIUART_CTS 0x4000
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#define ISL38XX_INT_IDENT_PCIUART_DR 0x8000
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/* Control/Status register bits */
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#define ISL38XX_CTRL_STAT_SLEEPMODE 0x00000200
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#define ISL38XX_CTRL_STAT_CLKRUN 0x00800000
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#define ISL38XX_CTRL_STAT_RESET 0x10000000
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#define ISL38XX_CTRL_STAT_RAMBOOT 0x20000000
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#define ISL38XX_CTRL_STAT_STARTHALTED 0x40000000
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#define ISL38XX_CTRL_STAT_HOST_OVERRIDE 0x80000000
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struct p54p_csr {
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__le32 dev_int;
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u8 unused_1[12];
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__le32 int_ident;
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__le32 int_ack;
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__le32 int_enable;
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u8 unused_2[4];
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union {
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__le32 ring_control_base;
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__le32 gen_purp_com[2];
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};
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u8 unused_3[8];
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__le32 direct_mem_base;
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u8 unused_4[44];
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__le32 dma_addr;
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__le32 dma_len;
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__le32 dma_ctrl;
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u8 unused_5[12];
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__le32 ctrl_stat;
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u8 unused_6[1924];
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u8 cardbus_cis[0x800];
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u8 direct_mem_win[0x1000];
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} __packed;
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/* usb backend only needs the register defines above */
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#ifndef P54USB_H
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struct p54p_desc {
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__le32 host_addr;
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__le32 device_addr;
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__le16 len;
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__le16 flags;
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} __packed;
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struct p54p_ring_control {
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__le32 host_idx[4];
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__le32 device_idx[4];
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struct p54p_desc rx_data[8];
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struct p54p_desc tx_data[32];
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struct p54p_desc rx_mgmt[4];
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struct p54p_desc tx_mgmt[4];
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} __packed;
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#define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r)
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#define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r)
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struct p54p_priv {
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struct p54_common common;
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struct pci_dev *pdev;
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struct p54p_csr __iomem *map;
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struct tasklet_struct tasklet;
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const struct firmware *firmware;
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spinlock_t lock;
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struct p54p_ring_control *ring_control;
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dma_addr_t ring_control_dma;
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u32 rx_idx_data, tx_idx_data;
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u32 rx_idx_mgmt, tx_idx_mgmt;
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struct sk_buff *rx_buf_data[8];
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struct sk_buff *rx_buf_mgmt[4];
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struct sk_buff *tx_buf_data[32];
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struct sk_buff *tx_buf_mgmt[4];
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struct completion boot_comp;
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struct completion fw_loaded;
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};
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#endif /* P54USB_H */
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#endif /* P54PCI_H */
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