/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* LMAC Interface specific definitions for mac80211 Prism54 drivers
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*
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* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
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* Copyright (c) 2007 - 2009, Christian Lamparter <chunkeey@web.de>
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*
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* Based on:
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* - the islsm (softmac prism54) driver, which is:
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* Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
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*
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* - LMAC API interface header file for STLC4560 (lmac_longbow.h)
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* Copyright (C) 2007 Conexant Systems, Inc.
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*/
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#ifndef LMAC_H
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#define LMAC_H
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enum p54_control_frame_types {
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P54_CONTROL_TYPE_SETUP = 0,
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P54_CONTROL_TYPE_SCAN,
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P54_CONTROL_TYPE_TRAP,
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P54_CONTROL_TYPE_DCFINIT,
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P54_CONTROL_TYPE_RX_KEYCACHE,
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P54_CONTROL_TYPE_TIM,
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P54_CONTROL_TYPE_PSM,
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P54_CONTROL_TYPE_TXCANCEL,
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P54_CONTROL_TYPE_TXDONE,
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P54_CONTROL_TYPE_BURST,
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P54_CONTROL_TYPE_STAT_READBACK,
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P54_CONTROL_TYPE_BBP,
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P54_CONTROL_TYPE_EEPROM_READBACK,
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P54_CONTROL_TYPE_LED,
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P54_CONTROL_TYPE_GPIO,
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P54_CONTROL_TYPE_TIMER,
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P54_CONTROL_TYPE_MODULATION,
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P54_CONTROL_TYPE_SYNTH_CONFIG,
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P54_CONTROL_TYPE_DETECTOR_VALUE,
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P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
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P54_CONTROL_TYPE_CCE_QUIET,
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P54_CONTROL_TYPE_PSM_STA_UNLOCK,
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P54_CONTROL_TYPE_PCS,
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P54_CONTROL_TYPE_BT_BALANCER = 28,
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P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE = 30,
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P54_CONTROL_TYPE_ARPTABLE = 31,
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P54_CONTROL_TYPE_BT_OPTIONS = 35,
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};
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#define P54_HDR_FLAG_CONTROL BIT(15)
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#define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0))
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#define P54_HDR_FLAG_DATA_ALIGN BIT(14)
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#define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
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#define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
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#define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
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#define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
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#define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
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#define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
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#define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
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#define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
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#define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
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#define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
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#define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
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#define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
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#define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
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#define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
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#define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
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#define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
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#define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
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#define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
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#define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
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#define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
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#define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
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#define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
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struct p54_hdr {
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__le16 flags;
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__le16 len;
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__le32 req_id;
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__le16 type; /* enum p54_control_frame_types */
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u8 rts_tries;
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u8 tries;
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u8 data[];
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} __packed;
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#define GET_REQ_ID(skb) \
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(((struct p54_hdr *) ((struct sk_buff *) skb)->data)->req_id) \
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#define FREE_AFTER_TX(skb) \
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((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \
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flags) == cpu_to_le16(P54_HDR_FLAG_CONTROL_OPSET))
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#define IS_DATA_FRAME(skb) \
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(!((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \
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flags) & cpu_to_le16(P54_HDR_FLAG_CONTROL)))
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#define GET_HW_QUEUE(skb) \
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(((struct p54_tx_data *)((struct p54_hdr *) \
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skb->data)->data)->hw_queue)
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/*
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* shared interface ID definitions
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* The interface ID is a unique identification of a specific interface.
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* The following values are reserved: 0x0000, 0x0002, 0x0012, 0x0014, 0x0015
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*/
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#define IF_ID_ISL36356A 0x0001 /* ISL36356A <-> Firmware */
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#define IF_ID_MVC 0x0003 /* MAC Virtual Coprocessor */
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#define IF_ID_DEBUG 0x0008 /* PolDebug Interface */
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#define IF_ID_PRODUCT 0x0009
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#define IF_ID_OEM 0x000a
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#define IF_ID_PCI3877 0x000b /* 3877 <-> Host PCI */
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#define IF_ID_ISL37704C 0x000c /* ISL37704C <-> Fw */
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#define IF_ID_ISL39000 0x000f /* ISL39000 <-> Fw */
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#define IF_ID_ISL39300A 0x0010 /* ISL39300A <-> Fw */
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#define IF_ID_ISL37700_UAP 0x0016 /* ISL37700 uAP Fw <-> Fw */
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#define IF_ID_ISL39000_UAP 0x0017 /* ISL39000 uAP Fw <-> Fw */
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#define IF_ID_LMAC 0x001a /* Interface exposed by LMAC */
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struct exp_if {
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__le16 role;
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__le16 if_id;
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__le16 variant;
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__le16 btm_compat;
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__le16 top_compat;
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} __packed;
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struct dep_if {
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__le16 role;
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__le16 if_id;
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__le16 variant;
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} __packed;
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/* driver <-> lmac definitions */
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struct p54_eeprom_lm86 {
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union {
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struct {
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__le16 offset;
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__le16 len;
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u8 data[0];
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} __packed v1;
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struct {
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__le32 offset;
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__le16 len;
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u8 magic2;
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u8 pad;
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u8 magic[4];
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u8 data[0];
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} __packed v2;
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} __packed;
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} __packed;
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enum p54_rx_decrypt_status {
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P54_DECRYPT_NONE = 0,
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P54_DECRYPT_OK,
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P54_DECRYPT_NOKEY,
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P54_DECRYPT_NOMICHAEL,
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P54_DECRYPT_NOCKIPMIC,
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P54_DECRYPT_FAIL_WEP,
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P54_DECRYPT_FAIL_TKIP,
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P54_DECRYPT_FAIL_MICHAEL,
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P54_DECRYPT_FAIL_CKIPKP,
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P54_DECRYPT_FAIL_CKIPMIC,
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P54_DECRYPT_FAIL_AESCCMP
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};
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struct p54_rx_data {
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__le16 flags;
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__le16 len;
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__le16 freq;
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u8 antenna;
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u8 rate;
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u8 rssi;
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u8 quality;
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u8 decrypt_status;
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u8 rssi_raw;
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__le32 tsf32;
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__le32 unalloc0;
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u8 align[];
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} __packed;
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enum p54_trap_type {
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P54_TRAP_SCAN = 0,
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P54_TRAP_TIMER,
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P54_TRAP_BEACON_TX,
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P54_TRAP_FAA_RADIO_ON,
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P54_TRAP_FAA_RADIO_OFF,
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P54_TRAP_RADAR,
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P54_TRAP_NO_BEACON,
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P54_TRAP_TBTT,
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P54_TRAP_SCO_ENTER,
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P54_TRAP_SCO_EXIT
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};
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struct p54_trap {
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__le16 event;
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__le16 frequency;
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} __packed;
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enum p54_frame_sent_status {
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P54_TX_OK = 0,
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P54_TX_FAILED,
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P54_TX_PSM,
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P54_TX_PSM_CANCELLED = 4
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};
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struct p54_frame_sent {
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u8 status;
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u8 tries;
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u8 ack_rssi;
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u8 quality;
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__le16 seq;
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u8 antenna;
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u8 padding;
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} __packed;
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enum p54_tx_data_crypt {
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P54_CRYPTO_NONE = 0,
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P54_CRYPTO_WEP,
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P54_CRYPTO_TKIP,
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P54_CRYPTO_TKIPMICHAEL,
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P54_CRYPTO_CCX_WEPMIC,
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P54_CRYPTO_CCX_KPMIC,
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P54_CRYPTO_CCX_KP,
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P54_CRYPTO_AESCCMP
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};
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enum p54_tx_data_queue {
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P54_QUEUE_BEACON = 0,
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P54_QUEUE_FWSCAN = 1,
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P54_QUEUE_MGMT = 2,
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P54_QUEUE_CAB = 3,
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P54_QUEUE_DATA = 4,
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P54_QUEUE_AC_NUM = 4,
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P54_QUEUE_AC_VO = 4,
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P54_QUEUE_AC_VI = 5,
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P54_QUEUE_AC_BE = 6,
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P54_QUEUE_AC_BK = 7,
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/* keep last */
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P54_QUEUE_NUM = 8,
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};
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#define IS_QOS_QUEUE(n) (n >= P54_QUEUE_DATA)
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struct p54_tx_data {
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u8 rateset[8];
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u8 rts_rate_idx;
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u8 crypt_offset;
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u8 key_type;
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u8 key_len;
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u8 key[16];
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u8 hw_queue;
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u8 backlog;
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__le16 durations[4];
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u8 tx_antenna;
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union {
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struct {
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u8 cts_rate;
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__le16 output_power;
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} __packed longbow;
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struct {
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u8 output_power;
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u8 cts_rate;
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u8 unalloc;
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} __packed normal;
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} __packed;
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u8 unalloc2[2];
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u8 align[];
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} __packed;
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/* unit is ms */
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#define P54_TX_FRAME_LIFETIME 2000
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#define P54_TX_TIMEOUT 4000
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#define P54_STATISTICS_UPDATE 5000
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#define P54_FILTER_TYPE_NONE 0
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#define P54_FILTER_TYPE_STATION BIT(0)
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#define P54_FILTER_TYPE_IBSS BIT(1)
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#define P54_FILTER_TYPE_AP BIT(2)
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#define P54_FILTER_TYPE_TRANSPARENT BIT(3)
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#define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
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#define P54_FILTER_TYPE_HIBERNATE BIT(5)
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#define P54_FILTER_TYPE_NOACK BIT(6)
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#define P54_FILTER_TYPE_RX_DISABLED BIT(7)
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struct p54_setup_mac {
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__le16 mac_mode;
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u8 mac_addr[ETH_ALEN];
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u8 bssid[ETH_ALEN];
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u8 rx_antenna;
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u8 rx_align;
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union {
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struct {
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__le32 basic_rate_mask;
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u8 rts_rates[8];
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__le32 rx_addr;
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__le16 max_rx;
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__le16 rxhw;
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__le16 wakeup_timer;
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__le16 unalloc0;
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} __packed v1;
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struct {
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__le32 rx_addr;
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__le16 max_rx;
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__le16 rxhw;
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__le16 timer;
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__le16 truncate;
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__le32 basic_rate_mask;
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u8 sbss_offset;
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u8 mcast_window;
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u8 rx_rssi_threshold;
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u8 rx_ed_threshold;
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__le32 ref_clock;
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__le16 lpf_bandwidth;
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__le16 osc_start_delay;
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} __packed v2;
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} __packed;
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} __packed;
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#define P54_SETUP_V1_LEN 40
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#define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
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#define P54_SCAN_EXIT BIT(0)
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#define P54_SCAN_TRAP BIT(1)
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#define P54_SCAN_ACTIVE BIT(2)
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#define P54_SCAN_FILTER BIT(3)
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struct p54_scan_head {
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__le16 mode;
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__le16 dwell;
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u8 scan_params[20];
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__le16 freq;
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} __packed;
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struct p54_pa_curve_data_sample {
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u8 rf_power;
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u8 pa_detector;
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u8 data_barker;
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u8 data_bpsk;
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u8 data_qpsk;
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u8 data_16qam;
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u8 data_64qam;
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u8 padding;
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} __packed;
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struct p54_scan_body {
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u8 pa_points_per_curve;
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u8 val_barker;
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u8 val_bpsk;
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u8 val_qpsk;
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u8 val_16qam;
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u8 val_64qam;
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struct p54_pa_curve_data_sample curve_data[8];
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u8 dup_bpsk;
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u8 dup_qpsk;
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u8 dup_16qam;
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u8 dup_64qam;
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} __packed;
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/*
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* Warning: Longbow's structures are bogus.
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*/
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struct p54_channel_output_limit_longbow {
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__le16 rf_power_points[12];
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} __packed;
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struct p54_pa_curve_data_sample_longbow {
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__le16 rf_power;
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__le16 pa_detector;
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struct {
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__le16 data[4];
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} points[3] __packed;
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} __packed;
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struct p54_scan_body_longbow {
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struct p54_channel_output_limit_longbow power_limits;
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struct p54_pa_curve_data_sample_longbow curve_data[8];
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__le16 unkn[6]; /* maybe more power_limits or rate_mask */
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} __packed;
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union p54_scan_body_union {
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struct p54_scan_body normal;
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struct p54_scan_body_longbow longbow;
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} __packed;
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struct p54_scan_tail_rate {
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__le32 basic_rate_mask;
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u8 rts_rates[8];
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} __packed;
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struct p54_led {
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__le16 flags;
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__le16 mask[2];
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__le16 delay[2];
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} __packed;
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struct p54_edcf {
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u8 flags;
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u8 slottime;
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u8 sifs;
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u8 eofpad;
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struct p54_edcf_queue_param queue[8];
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u8 mapping[4];
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__le16 frameburst;
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__le16 round_trip_delay;
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} __packed;
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struct p54_statistics {
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__le32 rx_success;
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__le32 rx_bad_fcs;
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__le32 rx_abort;
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__le32 rx_abort_phy;
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__le32 rts_success;
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__le32 rts_fail;
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__le32 tsf32;
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__le32 airtime;
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__le32 noise;
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__le32 sample_noise[8];
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__le32 sample_cca;
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__le32 sample_tx;
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} __packed;
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struct p54_xbow_synth {
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__le16 magic1;
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__le16 magic2;
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__le16 freq;
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u32 padding[5];
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} __packed;
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struct p54_timer {
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__le32 interval;
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} __packed;
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struct p54_keycache {
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u8 entry;
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u8 key_id;
|
u8 mac[ETH_ALEN];
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u8 padding[2];
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u8 key_type;
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u8 key_len;
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u8 key[24];
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} __packed;
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struct p54_burst {
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u8 flags;
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u8 queue;
|
u8 backlog;
|
u8 pad;
|
__le16 durations[32];
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} __packed;
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struct p54_psm_interval {
|
__le16 interval;
|
__le16 periods;
|
} __packed;
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|
#define P54_PSM_CAM 0
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#define P54_PSM BIT(0)
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#define P54_PSM_DTIM BIT(1)
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#define P54_PSM_MCBC BIT(2)
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#define P54_PSM_CHECKSUM BIT(3)
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#define P54_PSM_SKIP_MORE_DATA BIT(4)
|
#define P54_PSM_BEACON_TIMEOUT BIT(5)
|
#define P54_PSM_HFOSLEEP BIT(6)
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#define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
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#define P54_PSM_LPIT BIT(8)
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#define P54_PSM_BF_UCAST_SKIP BIT(9)
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#define P54_PSM_BF_MCAST_SKIP BIT(10)
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struct p54_psm {
|
__le16 mode;
|
__le16 aid;
|
struct p54_psm_interval intervals[4];
|
u8 beacon_rssi_skip_max;
|
u8 rssi_delta_threshold;
|
u8 nr;
|
u8 exclude[1];
|
} __packed;
|
|
#define MC_FILTER_ADDRESS_NUM 4
|
|
struct p54_group_address_table {
|
__le16 filter_enable;
|
__le16 num_address;
|
u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
|
} __packed;
|
|
struct p54_txcancel {
|
__le32 req_id;
|
} __packed;
|
|
struct p54_sta_unlock {
|
u8 addr[ETH_ALEN];
|
u16 padding;
|
} __packed;
|
|
#define P54_TIM_CLEAR BIT(15)
|
struct p54_tim {
|
u8 count;
|
u8 padding[3];
|
__le16 entry[8];
|
} __packed;
|
|
struct p54_cce_quiet {
|
__le32 period;
|
} __packed;
|
|
struct p54_bt_balancer {
|
__le16 prio_thresh;
|
__le16 acl_thresh;
|
} __packed;
|
|
struct p54_arp_table {
|
__le16 filter_enable;
|
u8 ipv4_addr[4];
|
} __packed;
|
|
/* LED control */
|
int p54_set_leds(struct p54_common *priv);
|
int p54_init_leds(struct p54_common *priv);
|
void p54_unregister_leds(struct p54_common *priv);
|
|
/* xmit functions */
|
void p54_tx_80211(struct ieee80211_hw *dev,
|
struct ieee80211_tx_control *control,
|
struct sk_buff *skb);
|
int p54_tx_cancel(struct p54_common *priv, __le32 req_id);
|
void p54_tx(struct p54_common *priv, struct sk_buff *skb);
|
|
/* synth/phy configuration */
|
int p54_init_xbow_synth(struct p54_common *priv);
|
int p54_scan(struct p54_common *priv, u16 mode, u16 dwell);
|
|
/* MAC */
|
int p54_sta_unlock(struct p54_common *priv, u8 *addr);
|
int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set);
|
int p54_setup_mac(struct p54_common *priv);
|
int p54_set_ps(struct p54_common *priv);
|
int p54_fetch_statistics(struct p54_common *priv);
|
int p54_set_groupfilter(struct p54_common *priv);
|
|
/* e/v DCF setup */
|
int p54_set_edcf(struct p54_common *priv);
|
|
/* cryptographic engine */
|
int p54_upload_key(struct p54_common *priv, u8 algo, int slot,
|
u8 idx, u8 len, u8 *addr, u8* key);
|
|
/* eeprom */
|
int p54_download_eeprom(struct p54_common *priv, void *buf,
|
u16 offset, u16 len);
|
struct p54_rssi_db_entry *p54_rssi_find(struct p54_common *p, const u16 freq);
|
|
/* utility */
|
u8 *p54_find_ie(struct sk_buff *skb, u8 ie);
|
|
#endif /* LMAC_H */
|
