// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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/* Copyright (c) 2019 Mellanox Technologies. */
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#include <linux/interrupt.h>
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#include <linux/notifier.h>
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#include <linux/module.h>
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#include <linux/mlx5/driver.h>
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#include "mlx5_core.h"
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#ifdef CONFIG_RFS_ACCEL
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#include <linux/cpu_rmap.h>
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#endif
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#define MLX5_MAX_IRQ_NAME (32)
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struct mlx5_irq {
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struct atomic_notifier_head nh;
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cpumask_var_t mask;
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char name[MLX5_MAX_IRQ_NAME];
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};
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struct mlx5_irq_table {
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struct mlx5_irq *irq;
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int nvec;
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#ifdef CONFIG_RFS_ACCEL
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struct cpu_rmap *rmap;
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#endif
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};
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int mlx5_irq_table_init(struct mlx5_core_dev *dev)
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{
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struct mlx5_irq_table *irq_table;
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irq_table = kvzalloc(sizeof(*irq_table), GFP_KERNEL);
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if (!irq_table)
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return -ENOMEM;
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dev->priv.irq_table = irq_table;
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return 0;
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}
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void mlx5_irq_table_cleanup(struct mlx5_core_dev *dev)
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{
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kvfree(dev->priv.irq_table);
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}
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int mlx5_irq_get_num_comp(struct mlx5_irq_table *table)
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{
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return table->nvec - MLX5_IRQ_VEC_COMP_BASE;
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}
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static struct mlx5_irq *mlx5_irq_get(struct mlx5_core_dev *dev, int vecidx)
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{
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struct mlx5_irq_table *irq_table = dev->priv.irq_table;
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return &irq_table->irq[vecidx];
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}
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int mlx5_irq_attach_nb(struct mlx5_irq_table *irq_table, int vecidx,
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struct notifier_block *nb)
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{
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struct mlx5_irq *irq;
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irq = &irq_table->irq[vecidx];
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return atomic_notifier_chain_register(&irq->nh, nb);
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}
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int mlx5_irq_detach_nb(struct mlx5_irq_table *irq_table, int vecidx,
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struct notifier_block *nb)
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{
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struct mlx5_irq *irq;
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irq = &irq_table->irq[vecidx];
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return atomic_notifier_chain_unregister(&irq->nh, nb);
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}
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static irqreturn_t mlx5_irq_int_handler(int irq, void *nh)
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{
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atomic_notifier_call_chain(nh, 0, NULL);
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return IRQ_HANDLED;
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}
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static void irq_set_name(char *name, int vecidx)
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{
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if (vecidx == 0) {
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snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_async");
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return;
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}
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snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d",
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vecidx - MLX5_IRQ_VEC_COMP_BASE);
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return;
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}
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static int request_irqs(struct mlx5_core_dev *dev, int nvec)
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{
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char name[MLX5_MAX_IRQ_NAME];
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int err;
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int i;
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for (i = 0; i < nvec; i++) {
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struct mlx5_irq *irq = mlx5_irq_get(dev, i);
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int irqn = pci_irq_vector(dev->pdev, i);
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irq_set_name(name, i);
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ATOMIC_INIT_NOTIFIER_HEAD(&irq->nh);
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snprintf(irq->name, MLX5_MAX_IRQ_NAME,
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"%s@pci:%s", name, pci_name(dev->pdev));
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err = request_irq(irqn, mlx5_irq_int_handler, 0, irq->name,
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&irq->nh);
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if (err) {
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mlx5_core_err(dev, "Failed to request irq\n");
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goto err_request_irq;
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}
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}
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return 0;
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err_request_irq:
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while (i--) {
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struct mlx5_irq *irq = mlx5_irq_get(dev, i);
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int irqn = pci_irq_vector(dev->pdev, i);
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free_irq(irqn, &irq->nh);
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}
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return err;
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}
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static void irq_clear_rmap(struct mlx5_core_dev *dev)
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{
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#ifdef CONFIG_RFS_ACCEL
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struct mlx5_irq_table *irq_table = dev->priv.irq_table;
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free_irq_cpu_rmap(irq_table->rmap);
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#endif
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}
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static int irq_set_rmap(struct mlx5_core_dev *mdev)
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{
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int err = 0;
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#ifdef CONFIG_RFS_ACCEL
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struct mlx5_irq_table *irq_table = mdev->priv.irq_table;
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int num_affinity_vec;
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int vecidx;
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num_affinity_vec = mlx5_irq_get_num_comp(irq_table);
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irq_table->rmap = alloc_irq_cpu_rmap(num_affinity_vec);
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if (!irq_table->rmap) {
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err = -ENOMEM;
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mlx5_core_err(mdev, "Failed to allocate cpu_rmap. err %d", err);
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goto err_out;
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}
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vecidx = MLX5_IRQ_VEC_COMP_BASE;
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for (; vecidx < irq_table->nvec; vecidx++) {
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err = irq_cpu_rmap_add(irq_table->rmap,
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pci_irq_vector(mdev->pdev, vecidx));
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if (err) {
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mlx5_core_err(mdev, "irq_cpu_rmap_add failed. err %d",
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err);
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goto err_irq_cpu_rmap_add;
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}
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}
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return 0;
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err_irq_cpu_rmap_add:
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irq_clear_rmap(mdev);
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err_out:
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#endif
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return err;
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}
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/* Completion IRQ vectors */
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static int set_comp_irq_affinity_hint(struct mlx5_core_dev *mdev, int i)
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{
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int vecidx = MLX5_IRQ_VEC_COMP_BASE + i;
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struct mlx5_irq *irq;
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int irqn;
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irq = mlx5_irq_get(mdev, vecidx);
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irqn = pci_irq_vector(mdev->pdev, vecidx);
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if (!zalloc_cpumask_var(&irq->mask, GFP_KERNEL)) {
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mlx5_core_warn(mdev, "zalloc_cpumask_var failed");
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return -ENOMEM;
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}
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cpumask_set_cpu(cpumask_local_spread(i, mdev->priv.numa_node),
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irq->mask);
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if (IS_ENABLED(CONFIG_SMP) &&
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irq_set_affinity_hint(irqn, irq->mask))
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mlx5_core_warn(mdev, "irq_set_affinity_hint failed, irq 0x%.4x",
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irqn);
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return 0;
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}
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static void clear_comp_irq_affinity_hint(struct mlx5_core_dev *mdev, int i)
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{
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int vecidx = MLX5_IRQ_VEC_COMP_BASE + i;
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struct mlx5_irq *irq;
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int irqn;
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irq = mlx5_irq_get(mdev, vecidx);
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irqn = pci_irq_vector(mdev->pdev, vecidx);
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irq_set_affinity_hint(irqn, NULL);
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free_cpumask_var(irq->mask);
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}
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static int set_comp_irq_affinity_hints(struct mlx5_core_dev *mdev)
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{
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int nvec = mlx5_irq_get_num_comp(mdev->priv.irq_table);
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int err;
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int i;
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for (i = 0; i < nvec; i++) {
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err = set_comp_irq_affinity_hint(mdev, i);
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if (err)
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goto err_out;
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}
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return 0;
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err_out:
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for (i--; i >= 0; i--)
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clear_comp_irq_affinity_hint(mdev, i);
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return err;
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}
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static void clear_comp_irqs_affinity_hints(struct mlx5_core_dev *mdev)
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{
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int nvec = mlx5_irq_get_num_comp(mdev->priv.irq_table);
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int i;
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for (i = 0; i < nvec; i++)
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clear_comp_irq_affinity_hint(mdev, i);
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}
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struct cpumask *
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mlx5_irq_get_affinity_mask(struct mlx5_irq_table *irq_table, int vecidx)
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{
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return irq_table->irq[vecidx].mask;
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}
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#ifdef CONFIG_RFS_ACCEL
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struct cpu_rmap *mlx5_irq_get_rmap(struct mlx5_irq_table *irq_table)
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{
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return irq_table->rmap;
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}
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#endif
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static void unrequest_irqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_irq_table *table = dev->priv.irq_table;
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int i;
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for (i = 0; i < table->nvec; i++)
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free_irq(pci_irq_vector(dev->pdev, i),
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&mlx5_irq_get(dev, i)->nh);
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}
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int mlx5_irq_table_create(struct mlx5_core_dev *dev)
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{
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struct mlx5_priv *priv = &dev->priv;
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struct mlx5_irq_table *table = priv->irq_table;
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int num_eqs = MLX5_CAP_GEN(dev, max_num_eqs) ?
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MLX5_CAP_GEN(dev, max_num_eqs) :
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1 << MLX5_CAP_GEN(dev, log_max_eq);
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int nvec;
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int err;
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nvec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() +
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MLX5_IRQ_VEC_COMP_BASE;
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nvec = min_t(int, nvec, num_eqs);
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if (nvec <= MLX5_IRQ_VEC_COMP_BASE)
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return -ENOMEM;
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table->irq = kcalloc(nvec, sizeof(*table->irq), GFP_KERNEL);
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if (!table->irq)
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return -ENOMEM;
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nvec = pci_alloc_irq_vectors(dev->pdev, MLX5_IRQ_VEC_COMP_BASE + 1,
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nvec, PCI_IRQ_MSIX);
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if (nvec < 0) {
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err = nvec;
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goto err_free_irq;
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}
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table->nvec = nvec;
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err = irq_set_rmap(dev);
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if (err)
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goto err_set_rmap;
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err = request_irqs(dev, nvec);
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if (err)
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goto err_request_irqs;
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err = set_comp_irq_affinity_hints(dev);
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if (err) {
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mlx5_core_err(dev, "Failed to alloc affinity hint cpumask\n");
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goto err_set_affinity;
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}
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return 0;
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err_set_affinity:
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unrequest_irqs(dev);
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err_request_irqs:
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irq_clear_rmap(dev);
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err_set_rmap:
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pci_free_irq_vectors(dev->pdev);
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err_free_irq:
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kfree(table->irq);
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return err;
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}
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void mlx5_irq_table_destroy(struct mlx5_core_dev *dev)
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{
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struct mlx5_irq_table *table = dev->priv.irq_table;
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int i;
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/* free_irq requires that affinity and rmap will be cleared
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* before calling it. This is why there is asymmetry with set_rmap
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* which should be called after alloc_irq but before request_irq.
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*/
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irq_clear_rmap(dev);
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clear_comp_irqs_affinity_hints(dev);
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for (i = 0; i < table->nvec; i++)
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free_irq(pci_irq_vector(dev->pdev, i),
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&mlx5_irq_get(dev, i)->nh);
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pci_free_irq_vectors(dev->pdev);
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kfree(table->irq);
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}
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