/*
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* Copyright (c) 2016, Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "en.h"
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/* mlx5e global resources should be placed in this file.
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* Global resources are common to all the netdevices crated on the same nic.
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*/
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int mlx5e_create_tir(struct mlx5_core_dev *mdev, struct mlx5e_tir *tir, u32 *in)
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{
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int err;
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err = mlx5_core_create_tir(mdev, in, &tir->tirn);
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if (err)
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return err;
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mutex_lock(&mdev->mlx5e_res.td.list_lock);
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list_add(&tir->list, &mdev->mlx5e_res.td.tirs_list);
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mutex_unlock(&mdev->mlx5e_res.td.list_lock);
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return 0;
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}
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void mlx5e_destroy_tir(struct mlx5_core_dev *mdev,
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struct mlx5e_tir *tir)
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{
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mutex_lock(&mdev->mlx5e_res.td.list_lock);
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mlx5_core_destroy_tir(mdev, tir->tirn);
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list_del(&tir->list);
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mutex_unlock(&mdev->mlx5e_res.td.list_lock);
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}
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void mlx5e_mkey_set_relaxed_ordering(struct mlx5_core_dev *mdev, void *mkc)
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{
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bool ro_pci_enable = pcie_relaxed_ordering_enabled(mdev->pdev);
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bool ro_write = MLX5_CAP_GEN(mdev, relaxed_ordering_write);
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bool ro_read = MLX5_CAP_GEN(mdev, relaxed_ordering_read);
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MLX5_SET(mkc, mkc, relaxed_ordering_read, ro_pci_enable && ro_read);
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MLX5_SET(mkc, mkc, relaxed_ordering_write, ro_pci_enable && ro_write);
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}
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static int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn,
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struct mlx5_core_mkey *mkey)
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{
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int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
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void *mkc;
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u32 *in;
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int err;
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in)
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return -ENOMEM;
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mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
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MLX5_SET(mkc, mkc, access_mode_1_0, MLX5_MKC_ACCESS_MODE_PA);
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MLX5_SET(mkc, mkc, lw, 1);
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MLX5_SET(mkc, mkc, lr, 1);
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mlx5e_mkey_set_relaxed_ordering(mdev, mkc);
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MLX5_SET(mkc, mkc, pd, pdn);
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MLX5_SET(mkc, mkc, length64, 1);
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MLX5_SET(mkc, mkc, qpn, 0xffffff);
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err = mlx5_core_create_mkey(mdev, mkey, in, inlen);
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kvfree(in);
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return err;
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}
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int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
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{
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struct mlx5e_resources *res = &mdev->mlx5e_res;
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int err;
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err = mlx5_core_alloc_pd(mdev, &res->pdn);
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if (err) {
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mlx5_core_err(mdev, "alloc pd failed, %d\n", err);
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return err;
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}
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err = mlx5_core_alloc_transport_domain(mdev, &res->td.tdn);
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if (err) {
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mlx5_core_err(mdev, "alloc td failed, %d\n", err);
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goto err_dealloc_pd;
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}
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err = mlx5e_create_mkey(mdev, res->pdn, &res->mkey);
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if (err) {
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mlx5_core_err(mdev, "create mkey failed, %d\n", err);
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goto err_dealloc_transport_domain;
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}
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err = mlx5_alloc_bfreg(mdev, &res->bfreg, false, false);
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if (err) {
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mlx5_core_err(mdev, "alloc bfreg failed, %d\n", err);
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goto err_destroy_mkey;
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}
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INIT_LIST_HEAD(&mdev->mlx5e_res.td.tirs_list);
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mutex_init(&mdev->mlx5e_res.td.list_lock);
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return 0;
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err_destroy_mkey:
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mlx5_core_destroy_mkey(mdev, &res->mkey);
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err_dealloc_transport_domain:
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mlx5_core_dealloc_transport_domain(mdev, res->td.tdn);
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err_dealloc_pd:
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mlx5_core_dealloc_pd(mdev, res->pdn);
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return err;
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}
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void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)
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{
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struct mlx5e_resources *res = &mdev->mlx5e_res;
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mlx5_free_bfreg(mdev, &res->bfreg);
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mlx5_core_destroy_mkey(mdev, &res->mkey);
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mlx5_core_dealloc_transport_domain(mdev, res->td.tdn);
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mlx5_core_dealloc_pd(mdev, res->pdn);
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memset(res, 0, sizeof(*res));
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}
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int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,
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bool enable_mc_lb)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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struct mlx5e_tir *tir;
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u8 lb_flags = 0;
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int err = 0;
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u32 tirn = 0;
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int inlen;
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void *in;
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inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in) {
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err = -ENOMEM;
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goto out;
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}
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if (enable_uc_lb)
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lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
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if (enable_mc_lb)
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lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
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if (lb_flags)
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MLX5_SET(modify_tir_in, in, ctx.self_lb_block, lb_flags);
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MLX5_SET(modify_tir_in, in, bitmask.self_lb_en, 1);
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mutex_lock(&mdev->mlx5e_res.td.list_lock);
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list_for_each_entry(tir, &mdev->mlx5e_res.td.tirs_list, list) {
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tirn = tir->tirn;
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err = mlx5_core_modify_tir(mdev, tirn, in);
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if (err)
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goto out;
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}
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out:
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kvfree(in);
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if (err)
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netdev_err(priv->netdev, "refresh tir(0x%x) failed, %d\n", tirn, err);
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mutex_unlock(&mdev->mlx5e_res.td.list_lock);
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return err;
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}
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