// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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/* Copyright (c) 2018 Mellanox Technologies. */
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#include <net/gre.h>
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#include "en/tc_tun.h"
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static bool mlx5e_tc_tun_can_offload_gretap(struct mlx5e_priv *priv)
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{
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return !!MLX5_CAP_ESW(priv->mdev, nvgre_encap_decap);
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}
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static int mlx5e_tc_tun_calc_hlen_gretap(struct mlx5e_encap_entry *e)
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{
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return gre_calc_hlen(e->tun_info->key.tun_flags);
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}
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static int mlx5e_tc_tun_init_encap_attr_gretap(struct net_device *tunnel_dev,
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struct mlx5e_priv *priv,
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struct mlx5e_encap_entry *e,
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struct netlink_ext_ack *extack)
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{
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e->tunnel = &gre_tunnel;
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e->reformat_type = MLX5_REFORMAT_TYPE_L2_TO_NVGRE;
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return 0;
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}
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static int mlx5e_gen_ip_tunnel_header_gretap(char buf[],
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__u8 *ip_proto,
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struct mlx5e_encap_entry *e)
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{
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const struct ip_tunnel_key *tun_key = &e->tun_info->key;
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struct gre_base_hdr *greh = (struct gre_base_hdr *)(buf);
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__be32 tun_id = tunnel_id_to_key32(tun_key->tun_id);
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int hdr_len;
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*ip_proto = IPPROTO_GRE;
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/* the HW does not calculate GRE csum or sequences */
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if (tun_key->tun_flags & (TUNNEL_CSUM | TUNNEL_SEQ))
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return -EOPNOTSUPP;
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greh->protocol = htons(ETH_P_TEB);
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/* GRE key */
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hdr_len = mlx5e_tc_tun_calc_hlen_gretap(e);
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greh->flags = gre_tnl_flags_to_gre_flags(tun_key->tun_flags);
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if (tun_key->tun_flags & TUNNEL_KEY) {
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__be32 *ptr = (__be32 *)(((u8 *)greh) + hdr_len - 4);
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*ptr = tun_id;
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}
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return 0;
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}
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static int mlx5e_tc_tun_parse_gretap(struct mlx5e_priv *priv,
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struct mlx5_flow_spec *spec,
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struct flow_cls_offload *f,
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void *headers_c,
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void *headers_v)
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{
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void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
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void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
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struct flow_rule *rule = flow_cls_offload_flow_rule(f);
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MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
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MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
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/* gre protocol */
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MLX5_SET_TO_ONES(fte_match_set_misc, misc_c, gre_protocol);
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MLX5_SET(fte_match_set_misc, misc_v, gre_protocol, ETH_P_TEB);
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/* gre key */
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if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
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struct flow_match_enc_keyid enc_keyid;
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flow_rule_match_enc_keyid(rule, &enc_keyid);
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MLX5_SET(fte_match_set_misc, misc_c,
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gre_key.key, be32_to_cpu(enc_keyid.mask->keyid));
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MLX5_SET(fte_match_set_misc, misc_v,
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gre_key.key, be32_to_cpu(enc_keyid.key->keyid));
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}
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spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
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return 0;
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}
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struct mlx5e_tc_tunnel gre_tunnel = {
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.tunnel_type = MLX5E_TC_TUNNEL_TYPE_GRETAP,
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.match_level = MLX5_MATCH_L3,
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.can_offload = mlx5e_tc_tun_can_offload_gretap,
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.calc_hlen = mlx5e_tc_tun_calc_hlen_gretap,
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.init_encap_attr = mlx5e_tc_tun_init_encap_attr_gretap,
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.generate_ip_tun_hdr = mlx5e_gen_ip_tunnel_header_gretap,
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.parse_udp_ports = NULL,
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.parse_tunnel = mlx5e_tc_tun_parse_gretap,
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};
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