// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2020 Rockchip Electronics Co., Ltd. */
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <media/v4l2-common.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-fh.h>
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#include <media/v4l2-ioctl.h>
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#include <media/v4l2-mc.h>
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#include <media/v4l2-subdev.h>
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#include <media/videobuf2-dma-contig.h>
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#include <media/videobuf2-dma-sg.h>
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#include <linux/rk-isp1-config.h>
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#include "dev.h"
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#include "regs.h"
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static void set_y_addr(struct rkispp_stream *stream, u32 val)
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{
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rkispp_write(stream->isppdev, stream->config->reg.cur_y_base, val);
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}
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static void set_uv_addr(struct rkispp_stream *stream, u32 val)
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{
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rkispp_write(stream->isppdev, stream->config->reg.cur_uv_base, val);
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}
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static void update_mi(struct rkispp_stream *stream)
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{
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struct rkispp_device *dev = stream->isppdev;
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struct rkispp_dummy_buffer *dummy_buf;
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u32 val;
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if (stream->curr_buf) {
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val = stream->curr_buf->buff_addr[RKISPP_PLANE_Y];
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set_y_addr(stream, val);
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val = stream->curr_buf->buff_addr[RKISPP_PLANE_UV];
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set_uv_addr(stream, val);
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}
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if (stream->type == STREAM_OUTPUT && !stream->curr_buf) {
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dummy_buf = &dev->hw_dev->dummy_buf;
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set_y_addr(stream, dummy_buf->dma_addr);
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set_uv_addr(stream, dummy_buf->dma_addr);
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}
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v4l2_dbg(2, rkispp_debug, &stream->isppdev->v4l2_dev,
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"%s stream:%d Y:0x%x UV:0x%x\n",
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__func__, stream->id,
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rkispp_read(dev, stream->config->reg.cur_y_base),
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rkispp_read(dev, stream->config->reg.cur_uv_base));
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}
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static int config_fec(struct rkispp_device *dev)
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{
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struct rkispp_params_vdev *params_vdev = &dev->params_vdev[PARAM_VDEV_FEC];
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struct rkispp_stream_vdev *vdev;
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struct rkispp_stream *stream = NULL;
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struct rkispp_fec_head *fec_data;
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struct rkispp_hw_dev *hw = dev->hw_dev;
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u32 fmt, mult = 1, mesh_size;
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u32 in_width, in_height;
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u32 addr_offs, max_w, max_h;
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u32 addryf, addrxf, addryi, addrxi;
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vdev = &dev->stream_vdev;
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vdev->fec.is_end = true;
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if (!(vdev->module_ens & ISPP_MODULE_FEC))
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return 0;
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if (dev->inp == INP_DDR) {
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stream = &vdev->stream[STREAM_II];
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fmt = stream->out_cap_fmt.wr_fmt;
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} else {
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fmt = FMT_YUV422;
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}
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in_width = dev->ispp_sdev.in_fmt.width;
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in_height = dev->ispp_sdev.in_fmt.height;
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max_w = hw->max_in.w ? hw->max_in.w : in_width;
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max_h = hw->max_in.h ? hw->max_in.h : in_height;
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addr_offs = max_w * max_h;
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vdev->fec.uv_offset = addr_offs;
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if (stream) {
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stream->config->frame_end_id = FEC_INT;
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stream->config->reg.cur_y_base = RKISPP_FEC_RD_Y_BASE;
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stream->config->reg.cur_uv_base = RKISPP_FEC_RD_UV_BASE;
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stream->config->reg.cur_y_base_shd = RKISPP_FEC_RD_Y_BASE_SHD;
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stream->config->reg.cur_uv_base_shd = RKISPP_FEC_RD_UV_BASE_SHD;
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}
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if (fmt & FMT_YUYV)
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mult = 2;
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rkispp_set_bits(dev, RKISPP_FEC_CTRL, FMT_RD_MASK, fmt);
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rkispp_write(dev, RKISPP_FEC_RD_VIR_STRIDE, ALIGN(in_width * mult, 16) >> 2);
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rkispp_write(dev, RKISPP_FEC_SRC_SIZE, in_height << 16 | in_width);
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fec_data = (struct rkispp_fec_head *)params_vdev->buf_fec[0].vaddr;
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if (fec_data) {
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rkispp_prepare_buffer(dev, ¶ms_vdev->buf_fec[0]);
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addrxf = params_vdev->buf_fec[0].dma_addr + fec_data->meshxf_oft;
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addryf = params_vdev->buf_fec[0].dma_addr + fec_data->meshyf_oft;
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addrxi = params_vdev->buf_fec[0].dma_addr + fec_data->meshxi_oft;
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addryi = params_vdev->buf_fec[0].dma_addr + fec_data->meshyi_oft;
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rkispp_write(dev, RKISPP_FEC_MESH_XFRA_BASE, addrxf);
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rkispp_write(dev, RKISPP_FEC_MESH_YFRA_BASE, addryf);
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rkispp_write(dev, RKISPP_FEC_MESH_XINT_BASE, addrxi);
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rkispp_write(dev, RKISPP_FEC_MESH_YINT_BASE, addryi);
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stream = &vdev->stream[STREAM_MB];
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if (stream->out_fmt.width > 1920) {
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mesh_size = cal_fec_mesh(stream->out_fmt.width, stream->out_fmt.height, 1);
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rkispp_set_bits(dev, RKISPP_FEC_CORE_CTRL, 0x20, SW_MESH_DENSITY);
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} else {
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mesh_size = cal_fec_mesh(stream->out_fmt.width, stream->out_fmt.height, 0);
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rkispp_set_bits(dev, RKISPP_FEC_CORE_CTRL, 0x20, 0);
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}
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rkispp_write(dev, RKISPP_FEC_MESH_SIZE, mesh_size);
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}
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stream = &vdev->stream[STREAM_MB];
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if (!stream->streaming) {
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rkispp_write(dev, RKISPP_FEC_WR_Y_BASE, hw->dummy_buf.dma_addr);
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rkispp_write(dev, RKISPP_FEC_WR_UV_BASE, hw->dummy_buf.dma_addr);
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}
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if (vdev->monitor.is_en) {
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init_completion(&vdev->monitor.fec.cmpl);
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schedule_work(&vdev->monitor.fec.work);
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}
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rkispp_set_clk_rate(dev->hw_dev->clks[0], dev->hw_dev->core_clk_max);
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v4l2_dbg(1, rkispp_debug, &dev->v4l2_dev,
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"%s size:%dx%d ctrl:0x%x core_ctrl:0x%x\n",
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__func__, in_width, in_height,
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rkispp_read(dev, RKISPP_FEC_CTRL),
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rkispp_read(dev, RKISPP_FEC_CORE_CTRL));
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return 0;
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}
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static void fec_free_buf(struct rkispp_device *dev)
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{
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struct rkispp_stream_vdev *vdev = &dev->stream_vdev;
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struct list_head *list = &vdev->fec.list_rd;
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struct rkisp_ispp_buf *dbufs;
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if (vdev->fec.cur_rd)
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vdev->fec.cur_rd = NULL;
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while (!list_empty(list)) {
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dbufs = get_list_buf(list, true);
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if (dbufs->is_isp)
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v4l2_subdev_call(dev->ispp_sdev.remote_sd,
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video, s_rx_buffer, dbufs, NULL);
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else
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get_list_buf(list, false);
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}
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}
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static int config_modules(struct rkispp_device *dev)
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{
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struct rkispp_params_vdev *params_vdev;
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int ret;
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v4l2_dbg(1, rkispp_debug, &dev->v4l2_dev,
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"stream module ens:0x%x\n", dev->stream_vdev.module_ens);
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dev->stream_vdev.monitor.monitoring_module = 0;
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dev->stream_vdev.monitor.restart_module = 0;
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dev->stream_vdev.monitor.is_restart = false;
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dev->stream_vdev.monitor.retry = 0;
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init_completion(&dev->stream_vdev.monitor.cmpl);
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ret = config_fec(dev);
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if (ret < 0)
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goto free_fec;
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/* config default params */
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params_vdev = &dev->params_vdev[PARAM_VDEV_FEC];
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params_vdev->params_ops->rkispp_params_cfg(params_vdev, 0);
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return 0;
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free_fec:
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fec_free_buf(dev);
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return ret;
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}
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static void fec_work_event(struct rkispp_device *dev,
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void *buff_rd,
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bool is_isr, bool is_quick)
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{
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struct rkispp_stream_vdev *vdev = &dev->stream_vdev;
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struct rkispp_monitor *monitor = &vdev->monitor;
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struct list_head *list = &vdev->fec.list_rd;
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void __iomem *base = dev->hw_dev->base_addr;
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struct rkispp_stream *stream = &vdev->stream[STREAM_II];
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unsigned long lock_flags = 0, lock_flags1 = 0;
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bool is_start = false;
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struct rkisp_ispp_reg *reg_buf = NULL;
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struct rkispp_buffer *inbuf;
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struct v4l2_subdev *sd = NULL;
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u32 val;
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struct rkisp_ispp_buf *buf_rd = buff_rd;
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if (!(vdev->module_ens & ISPP_MODULE_FEC))
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return;
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if (dev->inp == INP_ISP)
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sd = dev->ispp_sdev.remote_sd;
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spin_lock_irqsave(&vdev->fec.buf_lock, lock_flags);
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/* event from fec frame end */
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if (!buf_rd && is_isr) {
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vdev->fec.is_end = true;
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if (vdev->fec.cur_rd) {
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if (sd) {
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v4l2_subdev_call(sd, video, s_rx_buffer, vdev->fec.cur_rd, NULL);
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} else if (stream->streaming && vdev->fec.cur_rd->priv) {
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inbuf = vdev->fec.cur_rd->priv;
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vb2_buffer_done(&inbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
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}
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vdev->fec.cur_rd = NULL;
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}
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}
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spin_lock_irqsave(&monitor->lock, lock_flags1);
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if (monitor->is_restart && buf_rd) {
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list_add_tail(&buf_rd->list, list);
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goto restart_unlock;
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}
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if (buf_rd && vdev->fec.is_end && list_empty(list)) {
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/* fec read buf from nr */
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vdev->fec.cur_rd = buf_rd;
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} else if (vdev->fec.is_end && !list_empty(list)) {
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/* fec read buf from list
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* fec processing slow than nr
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* new read buf from nr into list
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*/
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vdev->fec.cur_rd = get_list_buf(list, true);
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if (buf_rd)
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list_add_tail(&buf_rd->list, list);
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} else if (!vdev->fec.is_end && buf_rd) {
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/* fec no idle
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* new read buf from nr into list
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*/
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list_add_tail(&buf_rd->list, list);
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}
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if (vdev->fec.cur_rd && vdev->fec.is_end) {
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if (vdev->fec.cur_rd->priv) {
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inbuf = vdev->fec.cur_rd->priv;
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val = inbuf->buff_addr[RKISPP_PLANE_Y];
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rkispp_write(dev, RKISPP_FEC_RD_Y_BASE, val);
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val = inbuf->buff_addr[RKISPP_PLANE_UV];
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rkispp_write(dev, RKISPP_FEC_RD_UV_BASE, val);
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} else {
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struct rkispp_isp_buf_pool *buf;
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buf = get_pool_buf(dev, vdev->fec.cur_rd);
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val = buf->dma[GROUP_BUF_PIC];
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rkispp_write(dev, RKISPP_FEC_RD_Y_BASE, val);
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val += vdev->fec.uv_offset;
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rkispp_write(dev, RKISPP_FEC_RD_UV_BASE, val);
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}
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is_start = true;
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}
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if (is_start) {
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u32 seq = 0;
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u64 timestamp = 0;
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if (vdev->fec.cur_rd) {
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seq = vdev->fec.cur_rd->frame_id;
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timestamp = vdev->fec.cur_rd->frame_timestamp;
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dev->ispp_sdev.frm_sync_seq = seq;
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dev->ispp_sdev.frame_timestamp = timestamp;
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rkispp_set_bits(dev, RKISPP_FEC_CORE_CTRL, 0x00, SW_FEC_EN);
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}
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stream = &vdev->stream[STREAM_MB];
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if (stream->streaming && !stream->is_cfg)
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secure_config_mb(stream);
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if (!dev->hw_dev->is_single)
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rkispp_update_regs(dev, RKISPP_CTRL, RKISPP_FEC_SRC_SIZE);
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writel(FEC_FORCE_UPD, base + RKISPP_CTRL_UPDATE);
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v4l2_dbg(3, rkispp_debug, &dev->v4l2_dev,
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"FEC start seq:%d | Y_SHD rd:0x%x\n",
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seq, readl(base + RKISPP_FEC_RD_Y_BASE_SHD));
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v4l2_dbg(2, rkispp_debug, &stream->isppdev->v4l2_dev,
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"%s stream:%d Y:0x%x UV:0x%x\n",
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__func__, stream->id,
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rkispp_read(dev, stream->config->reg.cur_y_base),
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rkispp_read(dev, stream->config->reg.cur_uv_base));
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vdev->fec.dbg.id = seq;
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vdev->fec.dbg.timestamp = ktime_get_ns();
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if (monitor->is_en) {
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monitor->fec.time = vdev->fec.dbg.interval / 1000 / 1000;
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monitor->monitoring_module |= MONITOR_FEC;
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if (!completion_done(&monitor->fec.cmpl))
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complete(&monitor->fec.cmpl);
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}
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if (stream->is_reg_withstream)
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rkispp_find_regbuf_by_id(dev, ®_buf, dev->dev_id, seq);
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if (!dev->hw_dev->is_shutdown)
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writel(FEC_ST, base + RKISPP_CTRL_STRT);
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vdev->fec.is_end = false;
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}
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restart_unlock:
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spin_unlock_irqrestore(&monitor->lock, lock_flags1);
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spin_unlock_irqrestore(&vdev->fec.buf_lock, lock_flags);
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}
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static void rkispp_module_work_event(struct rkispp_device *dev,
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void *buf_rd, void *buf_wr,
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u32 module, bool is_isr)
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{
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if (dev->hw_dev->is_shutdown)
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return;
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if (dev->ispp_sdev.state != ISPP_STOP)
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fec_work_event(dev, buf_rd, is_isr, false);
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/* cur frame (tnr->nr->fec) done for next frame
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* fec start at nr end if fec enable, and fec can async with
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* tnr different frames for single device.
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* tnr->nr->fec frame0
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* |->tnr->nr->fec frame1
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*/
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if (is_isr && !buf_rd && !buf_wr) {
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dev->stream_vdev.monitor.retry = 0;
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rkispp_event_handle(dev, CMD_QUEUE_DMABUF, NULL);
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}
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if (dev->ispp_sdev.state == ISPP_STOP) {
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if ((module & ISPP_MODULE_FEC) && buf_rd) {
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struct rkisp_ispp_buf *buf = buf_rd;
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if (buf->is_isp)
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v4l2_subdev_call(dev->ispp_sdev.remote_sd,
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video, s_rx_buffer, buf, NULL);
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}
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if (!dev->hw_dev->is_idle)
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dev->hw_dev->is_idle = true;
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}
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}
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static void rkispp_destroy_buf(struct rkispp_stream *stream)
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{
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struct rkispp_device *dev = stream->isppdev;
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struct rkispp_stream_vdev *vdev = &dev->stream_vdev;
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if (atomic_read(&vdev->refcnt) == 1) {
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vdev->irq_ends = 0;
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fec_free_buf(dev);
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rkispp_event_handle(dev, CMD_FREE_POOL, NULL);
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}
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}
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static int start_isp(struct rkispp_device *dev)
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{
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struct rkispp_subdev *ispp_sdev = &dev->ispp_sdev;
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struct rkispp_stream_vdev *vdev = &dev->stream_vdev;
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struct rkispp_stream *stream;
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struct rkisp_ispp_mode mode;
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int ret;
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if (dev->inp != INP_ISP || ispp_sdev->state)
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return 0;
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if (dev->stream_sync) {
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stream = &vdev->stream[STREAM_MB];
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if (stream->linked && !stream->streaming)
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return 0;
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} else if (atomic_read(&vdev->refcnt) > 1) {
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return 0;
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}
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rkispp_start_3a_run(dev);
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mutex_lock(&dev->hw_dev->dev_lock);
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mode.work_mode = ISP_ISPP_422;
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mode.buf_num = 1;
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mode.buf_num += RKISP_BUF_MAX + 2 * (dev->hw_dev->dev_num - 1);
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ret = v4l2_subdev_call(ispp_sdev->remote_sd, core, ioctl,
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RKISP_ISPP_CMD_SET_MODE, &mode);
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if (ret)
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goto err;
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ret = config_modules(dev);
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if (ret) {
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rkispp_event_handle(dev, CMD_FREE_POOL, NULL);
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mode.work_mode = ISP_ISPP_INIT_FAIL;
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v4l2_subdev_call(ispp_sdev->remote_sd, core, ioctl,
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RKISP_ISPP_CMD_SET_MODE, &mode);
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goto err;
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}
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if (dev->hw_dev->is_single)
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writel(ALL_FORCE_UPD, dev->hw_dev->base_addr + RKISPP_CTRL_UPDATE);
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stream = &vdev->stream[STREAM_MB];
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if (stream->streaming)
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stream->is_upd = true;
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if (dev->isp_mode & ISP_ISPP_QUICK)
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rkispp_set_bits(dev, RKISPP_CTRL_QUICK, 0, GLB_QUICK_EN);
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dev->isr_cnt = 0;
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dev->isr_err_cnt = 0;
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ret = v4l2_subdev_call(&ispp_sdev->sd, video, s_stream, true);
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err:
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mutex_unlock(&dev->hw_dev->dev_lock);
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return ret;
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}
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static void check_to_force_update(struct rkispp_device *dev, u32 mis_val)
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{
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struct rkispp_stream_vdev *vdev = &dev->stream_vdev;
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struct rkispp_stream *stream;
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u32 mask = FEC_INT;
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vdev->irq_ends |= (mis_val & mask);
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v4l2_dbg(3, rkispp_debug, &dev->v4l2_dev,
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"irq_ends:0x%x mask:0x%x\n",
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vdev->irq_ends, mask);
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if (vdev->irq_ends != mask)
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return;
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vdev->irq_ends = 0;
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if (mis_val & FEC_INT)
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rkispp_module_work_event(dev, NULL, NULL,
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ISPP_MODULE_FEC, true);
|
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stream = &vdev->stream[STREAM_MB];
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if (stream->streaming)
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stream->is_upd = true;
|
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}
|
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static struct rkispp_stream_ops rkispp_stream_ops = {
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.config_modules = config_modules,
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.destroy_buf = rkispp_destroy_buf,
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.fec_work_event = fec_work_event,
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.start_isp = start_isp,
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.check_to_force_update = check_to_force_update,
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.update_mi = update_mi,
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.rkispp_module_work_event = rkispp_module_work_event,
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};
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void rkispp_stream_init_ops_v20(struct rkispp_stream_vdev *stream_vdev)
|
{
|
stream_vdev->stream_ops = &rkispp_stream_ops;
|
}
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