/* Copyright 2012-17 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DC_MCIF_WB_H__
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#define __DC_MCIF_WB_H__
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#include "dc_hw_types.h"
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enum mmhubbub_wbif_mode {
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PACKED_444 = 0,
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PACKED_444_FP16 = 1,
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PLANAR_420_8BPC = 2,
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PLANAR_420_10BPC = 3
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};
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struct mcif_arb_params {
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unsigned int time_per_pixel;
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unsigned int cli_watermark[4];
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unsigned int pstate_watermark[4];
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unsigned int arbitration_slice;
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unsigned int slice_lines;
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unsigned int max_scaled_time;
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#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
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unsigned int dram_speed_change_duration;
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#endif
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};
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struct mcif_irq_params {
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unsigned int sw_int_en;
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unsigned int sw_slice_int_en;
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unsigned int sw_overrun_int_en;
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unsigned int vce_int_en;
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unsigned int vce_slice_int_en;
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};
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/* / - mcif_wb_frame_dump_info is the info of the dumping WB data */
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struct mcif_wb_frame_dump_info {
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unsigned int size;
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unsigned int width;
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unsigned int height;
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unsigned int luma_pitch;
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unsigned int chroma_pitch;
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enum dwb_scaler_mode format;
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};
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struct mcif_wb {
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const struct mcif_wb_funcs *funcs;
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struct dc_context *ctx;
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int inst;
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};
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struct mcif_wb_funcs {
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#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
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void (*warmup_mcif)(
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struct mcif_wb *mcif_wb,
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struct mcif_warmup_params *params);
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#endif
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void (*enable_mcif)(struct mcif_wb *mcif_wb);
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void (*disable_mcif)(struct mcif_wb *mcif_wb);
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void (*config_mcif_buf)(
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struct mcif_wb *mcif_wb,
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struct mcif_buf_params *params,
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unsigned int dest_height);
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void (*config_mcif_arb)(
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struct mcif_wb *mcif_wb,
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struct mcif_arb_params *params);
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void (*config_mcif_irq)(
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struct mcif_wb *mcif_wb,
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struct mcif_irq_params *params);
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void (*dump_frame)(
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struct mcif_wb *mcif_wb,
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struct mcif_buf_params *mcif_params,
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enum dwb_scaler_mode out_format,
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unsigned int dest_width,
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unsigned int dest_height,
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struct mcif_wb_frame_dump_info *dump_info,
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unsigned char *luma_buffer,
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unsigned char *chroma_buffer,
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unsigned char *dest_luma_buffer,
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unsigned char *dest_chroma_buffer);
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};
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#endif
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