/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Supervisor Mode Access Prevention support
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*
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* Copyright (C) 2012 Intel Corporation
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* Author: H. Peter Anvin <hpa@linux.intel.com>
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*/
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#ifndef _ASM_X86_SMAP_H
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#define _ASM_X86_SMAP_H
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#include <asm/nops.h>
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#include <asm/cpufeatures.h>
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#include <asm/alternative.h>
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/* "Raw" instruction opcodes */
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#define __ASM_CLAC ".byte 0x0f,0x01,0xca"
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#define __ASM_STAC ".byte 0x0f,0x01,0xcb"
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#ifdef __ASSEMBLY__
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#ifdef CONFIG_X86_SMAP
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#define ASM_CLAC \
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ALTERNATIVE "", __ASM_CLAC, X86_FEATURE_SMAP
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#define ASM_STAC \
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ALTERNATIVE "", __ASM_STAC, X86_FEATURE_SMAP
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#else /* CONFIG_X86_SMAP */
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#define ASM_CLAC
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#define ASM_STAC
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#endif /* CONFIG_X86_SMAP */
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#else /* __ASSEMBLY__ */
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#ifdef CONFIG_X86_SMAP
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static __always_inline void clac(void)
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{
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/* Note: a barrier is implicit in alternative() */
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alternative("", __ASM_CLAC, X86_FEATURE_SMAP);
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}
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static __always_inline void stac(void)
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{
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/* Note: a barrier is implicit in alternative() */
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alternative("", __ASM_STAC, X86_FEATURE_SMAP);
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}
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static __always_inline unsigned long smap_save(void)
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{
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unsigned long flags;
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asm volatile ("# smap_save\n\t"
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ALTERNATIVE("jmp 1f", "", X86_FEATURE_SMAP)
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"pushf; pop %0; " __ASM_CLAC "\n\t"
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"1:"
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: "=rm" (flags) : : "memory", "cc");
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return flags;
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}
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static __always_inline void smap_restore(unsigned long flags)
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{
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asm volatile ("# smap_restore\n\t"
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ALTERNATIVE("jmp 1f", "", X86_FEATURE_SMAP)
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"push %0; popf\n\t"
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"1:"
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: : "g" (flags) : "memory", "cc");
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}
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/* These macros can be used in asm() statements */
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#define ASM_CLAC \
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ALTERNATIVE("", __ASM_CLAC, X86_FEATURE_SMAP)
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#define ASM_STAC \
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ALTERNATIVE("", __ASM_STAC, X86_FEATURE_SMAP)
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#else /* CONFIG_X86_SMAP */
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static inline void clac(void) { }
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static inline void stac(void) { }
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static inline unsigned long smap_save(void) { return 0; }
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static inline void smap_restore(unsigned long flags) { }
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#define ASM_CLAC
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#define ASM_STAC
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#endif /* CONFIG_X86_SMAP */
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_X86_SMAP_H */
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