/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_PGTABLE_DEFS_H
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#define _ASM_X86_PGTABLE_DEFS_H
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#include <linux/const.h>
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#include <linux/mem_encrypt.h>
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#include <asm/page_types.h>
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#define FIRST_USER_ADDRESS 0UL
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#define _PAGE_BIT_PRESENT 0 /* is present */
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#define _PAGE_BIT_RW 1 /* writeable */
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#define _PAGE_BIT_USER 2 /* userspace addressable */
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#define _PAGE_BIT_PWT 3 /* page write through */
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#define _PAGE_BIT_PCD 4 /* page cache disabled */
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#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
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#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
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#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
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#define _PAGE_BIT_PAT 7 /* on 4KB pages */
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#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
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#define _PAGE_BIT_SOFTW1 9 /* available for programmer */
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#define _PAGE_BIT_SOFTW2 10 /* " */
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#define _PAGE_BIT_SOFTW3 11 /* " */
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#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
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#define _PAGE_BIT_SOFTW4 58 /* available for programmer */
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#define _PAGE_BIT_PKEY_BIT0 59 /* Protection Keys, bit 1/4 */
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#define _PAGE_BIT_PKEY_BIT1 60 /* Protection Keys, bit 2/4 */
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#define _PAGE_BIT_PKEY_BIT2 61 /* Protection Keys, bit 3/4 */
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#define _PAGE_BIT_PKEY_BIT3 62 /* Protection Keys, bit 4/4 */
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#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
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#define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
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#define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
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#define _PAGE_BIT_UFFD_WP _PAGE_BIT_SOFTW2 /* userfaultfd wrprotected */
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#define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */
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#define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4
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/* If _PAGE_BIT_PRESENT is clear, we use these: */
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/* - if the user mapped it with PROT_NONE; pte_present gives true */
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#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
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#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
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#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
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#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
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#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
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#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
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#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
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#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
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#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
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#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
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#define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
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#define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
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#define _PAGE_SOFTW3 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW3)
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#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
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#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
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#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
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#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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#define _PAGE_PKEY_BIT0 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT0)
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#define _PAGE_PKEY_BIT1 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT1)
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#define _PAGE_PKEY_BIT2 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT2)
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#define _PAGE_PKEY_BIT3 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT3)
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#else
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#define _PAGE_PKEY_BIT0 (_AT(pteval_t, 0))
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#define _PAGE_PKEY_BIT1 (_AT(pteval_t, 0))
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#define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0))
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#define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0))
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#endif
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#define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \
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_PAGE_PKEY_BIT1 | \
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_PAGE_PKEY_BIT2 | \
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_PAGE_PKEY_BIT3)
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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#define _PAGE_KNL_ERRATUM_MASK (_PAGE_DIRTY | _PAGE_ACCESSED)
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#else
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#define _PAGE_KNL_ERRATUM_MASK 0
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#endif
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#ifdef CONFIG_MEM_SOFT_DIRTY
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#define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
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#else
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#define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))
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#endif
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/*
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* Tracking soft dirty bit when a page goes to a swap is tricky.
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* We need a bit which can be stored in pte _and_ not conflict
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* with swap entry format. On x86 bits 1-4 are *not* involved
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* into swap entry computation, but bit 7 is used for thp migration,
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* so we borrow bit 1 for soft dirty tracking.
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*
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* Please note that this bit must be treated as swap dirty page
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* mark if and only if the PTE/PMD has present bit clear!
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*/
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#ifdef CONFIG_MEM_SOFT_DIRTY
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#define _PAGE_SWP_SOFT_DIRTY _PAGE_RW
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#else
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#define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))
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#endif
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#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
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#define _PAGE_UFFD_WP (_AT(pteval_t, 1) << _PAGE_BIT_UFFD_WP)
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#define _PAGE_SWP_UFFD_WP _PAGE_USER
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#else
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#define _PAGE_UFFD_WP (_AT(pteval_t, 0))
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#define _PAGE_SWP_UFFD_WP (_AT(pteval_t, 0))
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#endif
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
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#define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP)
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#else
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#define _PAGE_NX (_AT(pteval_t, 0))
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#define _PAGE_DEVMAP (_AT(pteval_t, 0))
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#endif
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#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
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/*
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* Set of bits not changed in pte_modify. The pte's
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* protection key is treated like _PAGE_RW, for
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* instance, and is *not* included in this mask since
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* pte_modify() does modify it.
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*/
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#define _COMMON_PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
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_PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY |\
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_PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_ENC | \
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_PAGE_UFFD_WP)
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#define _PAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PAT)
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#define _HPAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PSE | _PAGE_PAT_LARGE)
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/*
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* The cache modes defined here are used to translate between pure SW usage
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* and the HW defined cache mode bits and/or PAT entries.
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*
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* The resulting bits for PWT, PCD and PAT should be chosen in a way
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* to have the WB mode at index 0 (all bits clear). This is the default
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* right now and likely would break too much if changed.
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*/
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#ifndef __ASSEMBLY__
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enum page_cache_mode {
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_PAGE_CACHE_MODE_WB = 0,
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_PAGE_CACHE_MODE_WC = 1,
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_PAGE_CACHE_MODE_UC_MINUS = 2,
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_PAGE_CACHE_MODE_UC = 3,
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_PAGE_CACHE_MODE_WT = 4,
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_PAGE_CACHE_MODE_WP = 5,
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_PAGE_CACHE_MODE_NUM = 8
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};
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#endif
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#define _PAGE_ENC (_AT(pteval_t, sme_me_mask))
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#define _PAGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)
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#define _PAGE_LARGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT_LARGE)
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#define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
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#define _PAGE_CACHE_WP (cachemode2protval(_PAGE_CACHE_MODE_WP))
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#define __PP _PAGE_PRESENT
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#define __RW _PAGE_RW
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#define _USR _PAGE_USER
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#define ___A _PAGE_ACCESSED
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#define ___D _PAGE_DIRTY
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#define ___G _PAGE_GLOBAL
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#define __NX _PAGE_NX
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#define _ENC _PAGE_ENC
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#define __WP _PAGE_CACHE_WP
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#define __NC _PAGE_NOCACHE
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#define _PSE _PAGE_PSE
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#define pgprot_val(x) ((x).pgprot)
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#define __pgprot(x) ((pgprot_t) { (x) } )
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#define __pg(x) __pgprot(x)
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#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
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#define PAGE_NONE __pg( 0| 0| 0|___A| 0| 0| 0|___G)
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#define PAGE_SHARED __pg(__PP|__RW|_USR|___A|__NX| 0| 0| 0)
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#define PAGE_SHARED_EXEC __pg(__PP|__RW|_USR|___A| 0| 0| 0| 0)
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#define PAGE_COPY_NOEXEC __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
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#define PAGE_COPY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0)
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#define PAGE_COPY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
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#define PAGE_READONLY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
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#define PAGE_READONLY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0)
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#define __PAGE_KERNEL (__PP|__RW| 0|___A|__NX|___D| 0|___G)
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#define __PAGE_KERNEL_EXEC (__PP|__RW| 0|___A| 0|___D| 0|___G)
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#define _KERNPG_TABLE_NOENC (__PP|__RW| 0|___A| 0|___D| 0| 0)
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#define _KERNPG_TABLE (__PP|__RW| 0|___A| 0|___D| 0| 0| _ENC)
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#define _PAGE_TABLE_NOENC (__PP|__RW|_USR|___A| 0|___D| 0| 0)
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#define _PAGE_TABLE (__PP|__RW|_USR|___A| 0|___D| 0| 0| _ENC)
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#define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G)
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#define __PAGE_KERNEL_ROX (__PP| 0| 0|___A| 0|___D| 0|___G)
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#define __PAGE_KERNEL_NOCACHE (__PP|__RW| 0|___A|__NX|___D| 0|___G| __NC)
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#define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G)
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#define __PAGE_KERNEL_LARGE (__PP|__RW| 0|___A|__NX|___D|_PSE|___G)
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#define __PAGE_KERNEL_LARGE_EXEC (__PP|__RW| 0|___A| 0|___D|_PSE|___G)
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#define __PAGE_KERNEL_WP (__PP|__RW| 0|___A|__NX|___D| 0|___G| __WP)
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#define __PAGE_KERNEL_IO __PAGE_KERNEL
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#define __PAGE_KERNEL_IO_NOCACHE __PAGE_KERNEL_NOCACHE
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#ifndef __ASSEMBLY__
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#define __PAGE_KERNEL_ENC (__PAGE_KERNEL | _ENC)
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#define __PAGE_KERNEL_ENC_WP (__PAGE_KERNEL_WP | _ENC)
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#define __PAGE_KERNEL_NOENC (__PAGE_KERNEL | 0)
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#define __PAGE_KERNEL_NOENC_WP (__PAGE_KERNEL_WP | 0)
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#define __pgprot_mask(x) __pgprot((x) & __default_kernel_pte_mask)
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#define PAGE_KERNEL __pgprot_mask(__PAGE_KERNEL | _ENC)
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#define PAGE_KERNEL_NOENC __pgprot_mask(__PAGE_KERNEL | 0)
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#define PAGE_KERNEL_RO __pgprot_mask(__PAGE_KERNEL_RO | _ENC)
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#define PAGE_KERNEL_EXEC __pgprot_mask(__PAGE_KERNEL_EXEC | _ENC)
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#define PAGE_KERNEL_EXEC_NOENC __pgprot_mask(__PAGE_KERNEL_EXEC | 0)
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#define PAGE_KERNEL_ROX __pgprot_mask(__PAGE_KERNEL_ROX | _ENC)
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#define PAGE_KERNEL_NOCACHE __pgprot_mask(__PAGE_KERNEL_NOCACHE | _ENC)
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#define PAGE_KERNEL_LARGE __pgprot_mask(__PAGE_KERNEL_LARGE | _ENC)
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#define PAGE_KERNEL_LARGE_EXEC __pgprot_mask(__PAGE_KERNEL_LARGE_EXEC | _ENC)
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#define PAGE_KERNEL_VVAR __pgprot_mask(__PAGE_KERNEL_VVAR | _ENC)
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#define PAGE_KERNEL_IO __pgprot_mask(__PAGE_KERNEL_IO)
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#define PAGE_KERNEL_IO_NOCACHE __pgprot_mask(__PAGE_KERNEL_IO_NOCACHE)
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#endif /* __ASSEMBLY__ */
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/* xwr */
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY_EXEC
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#define __P101 PAGE_READONLY_EXEC
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#define __P110 PAGE_COPY_EXEC
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#define __P111 PAGE_COPY_EXEC
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY_EXEC
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#define __S101 PAGE_READONLY_EXEC
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#define __S110 PAGE_SHARED_EXEC
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#define __S111 PAGE_SHARED_EXEC
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/*
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* early identity mapping pte attrib macros.
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*/
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#ifdef CONFIG_X86_64
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#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
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#else
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#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
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#define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */
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#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
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#endif
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#ifdef CONFIG_X86_32
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# include <asm/pgtable_32_types.h>
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#else
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# include <asm/pgtable_64_types.h>
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#endif
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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/* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */
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#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
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/*
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* Extracts the flags from a (pte|pmd|pud|pgd)val_t
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* This includes the protection key value.
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*/
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#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
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typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
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typedef struct { pgdval_t pgd; } pgd_t;
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static inline pgprot_t pgprot_nx(pgprot_t prot)
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{
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return __pgprot(pgprot_val(prot) | _PAGE_NX);
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}
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#define pgprot_nx pgprot_nx
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#ifdef CONFIG_X86_PAE
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/*
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* PHYSICAL_PAGE_MASK might be non-constant when SME is compiled in, so we can't
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* use it here.
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*/
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#define PGD_PAE_PAGE_MASK ((signed long)PAGE_MASK)
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#define PGD_PAE_PHYS_MASK (((1ULL << __PHYSICAL_MASK_SHIFT)-1) & PGD_PAE_PAGE_MASK)
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/*
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* PAE allows Base Address, P, PWT, PCD and AVL bits to be set in PGD entries.
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* All other bits are Reserved MBZ
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*/
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#define PGD_ALLOWED_BITS (PGD_PAE_PHYS_MASK | _PAGE_PRESENT | \
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_PAGE_PWT | _PAGE_PCD | \
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_PAGE_SOFTW1 | _PAGE_SOFTW2 | _PAGE_SOFTW3)
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#else
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/* No need to mask any bits for !PAE */
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#define PGD_ALLOWED_BITS (~0ULL)
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#endif
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static inline pgd_t native_make_pgd(pgdval_t val)
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{
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return (pgd_t) { val & PGD_ALLOWED_BITS };
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}
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static inline pgdval_t native_pgd_val(pgd_t pgd)
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{
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return pgd.pgd & PGD_ALLOWED_BITS;
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}
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static inline pgdval_t pgd_flags(pgd_t pgd)
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{
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return native_pgd_val(pgd) & PTE_FLAGS_MASK;
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}
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#if CONFIG_PGTABLE_LEVELS > 4
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typedef struct { p4dval_t p4d; } p4d_t;
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static inline p4d_t native_make_p4d(pudval_t val)
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{
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return (p4d_t) { val };
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}
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static inline p4dval_t native_p4d_val(p4d_t p4d)
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{
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return p4d.p4d;
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}
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#else
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#include <asm-generic/pgtable-nop4d.h>
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static inline p4d_t native_make_p4d(pudval_t val)
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{
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return (p4d_t) { .pgd = native_make_pgd((pgdval_t)val) };
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}
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static inline p4dval_t native_p4d_val(p4d_t p4d)
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{
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return native_pgd_val(p4d.pgd);
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}
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#endif
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#if CONFIG_PGTABLE_LEVELS > 3
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typedef struct { pudval_t pud; } pud_t;
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static inline pud_t native_make_pud(pmdval_t val)
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{
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return (pud_t) { val };
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}
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static inline pudval_t native_pud_val(pud_t pud)
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{
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return pud.pud;
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}
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#else
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#include <asm-generic/pgtable-nopud.h>
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static inline pud_t native_make_pud(pudval_t val)
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{
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return (pud_t) { .p4d.pgd = native_make_pgd(val) };
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}
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static inline pudval_t native_pud_val(pud_t pud)
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{
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return native_pgd_val(pud.p4d.pgd);
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}
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#endif
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#if CONFIG_PGTABLE_LEVELS > 2
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typedef struct { pmdval_t pmd; } pmd_t;
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static inline pmd_t native_make_pmd(pmdval_t val)
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{
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return (pmd_t) { val };
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}
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static inline pmdval_t native_pmd_val(pmd_t pmd)
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{
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return pmd.pmd;
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}
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#else
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#include <asm-generic/pgtable-nopmd.h>
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static inline pmd_t native_make_pmd(pmdval_t val)
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{
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return (pmd_t) { .pud.p4d.pgd = native_make_pgd(val) };
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}
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static inline pmdval_t native_pmd_val(pmd_t pmd)
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{
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return native_pgd_val(pmd.pud.p4d.pgd);
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}
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#endif
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static inline p4dval_t p4d_pfn_mask(p4d_t p4d)
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{
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/* No 512 GiB huge pages yet */
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return PTE_PFN_MASK;
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}
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static inline p4dval_t p4d_flags_mask(p4d_t p4d)
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{
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return ~p4d_pfn_mask(p4d);
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}
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static inline p4dval_t p4d_flags(p4d_t p4d)
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{
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return native_p4d_val(p4d) & p4d_flags_mask(p4d);
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}
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static inline pudval_t pud_pfn_mask(pud_t pud)
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{
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if (native_pud_val(pud) & _PAGE_PSE)
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return PHYSICAL_PUD_PAGE_MASK;
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else
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return PTE_PFN_MASK;
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}
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static inline pudval_t pud_flags_mask(pud_t pud)
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{
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return ~pud_pfn_mask(pud);
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}
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static inline pudval_t pud_flags(pud_t pud)
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{
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return native_pud_val(pud) & pud_flags_mask(pud);
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}
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static inline pmdval_t pmd_pfn_mask(pmd_t pmd)
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{
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if (native_pmd_val(pmd) & _PAGE_PSE)
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return PHYSICAL_PMD_PAGE_MASK;
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else
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return PTE_PFN_MASK;
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}
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static inline pmdval_t pmd_flags_mask(pmd_t pmd)
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{
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return ~pmd_pfn_mask(pmd);
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}
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static inline pmdval_t pmd_flags(pmd_t pmd)
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{
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return native_pmd_val(pmd) & pmd_flags_mask(pmd);
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}
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static inline pte_t native_make_pte(pteval_t val)
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{
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return (pte_t) { .pte = val };
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}
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static inline pteval_t native_pte_val(pte_t pte)
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{
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return pte.pte;
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}
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static inline pteval_t pte_flags(pte_t pte)
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{
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return native_pte_val(pte) & PTE_FLAGS_MASK;
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}
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#define __pte2cm_idx(cb) \
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((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \
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(((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \
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(((cb) >> _PAGE_BIT_PWT) & 1))
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#define __cm_idx2pte(i) \
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((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \
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(((i) & 2) << (_PAGE_BIT_PCD - 1)) | \
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(((i) & 1) << _PAGE_BIT_PWT))
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unsigned long cachemode2protval(enum page_cache_mode pcm);
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static inline pgprotval_t protval_4k_2_large(pgprotval_t val)
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{
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return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
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((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
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}
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static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
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{
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return __pgprot(protval_4k_2_large(pgprot_val(pgprot)));
|
}
|
static inline pgprotval_t protval_large_2_4k(pgprotval_t val)
|
{
|
return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
|
((val & _PAGE_PAT_LARGE) >>
|
(_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
|
}
|
static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
|
{
|
return __pgprot(protval_large_2_4k(pgprot_val(pgprot)));
|
}
|
|
|
typedef struct page *pgtable_t;
|
|
extern pteval_t __supported_pte_mask;
|
extern pteval_t __default_kernel_pte_mask;
|
extern void set_nx(void);
|
extern int nx_enabled;
|
|
#define pgprot_writecombine pgprot_writecombine
|
extern pgprot_t pgprot_writecombine(pgprot_t prot);
|
|
#define pgprot_writethrough pgprot_writethrough
|
extern pgprot_t pgprot_writethrough(pgprot_t prot);
|
|
/* Indicate that x86 has its own track and untrack pfn vma functions */
|
#define __HAVE_PFNMAP_TRACKING
|
|
#define __HAVE_PHYS_MEM_ACCESS_PROT
|
struct file;
|
pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
|
unsigned long size, pgprot_t vma_prot);
|
|
/* Install a pte for a particular vaddr in kernel space. */
|
void set_pte_vaddr(unsigned long vaddr, pte_t pte);
|
|
#ifdef CONFIG_X86_32
|
extern void native_pagetable_init(void);
|
#else
|
#define native_pagetable_init paging_init
|
#endif
|
|
struct seq_file;
|
extern void arch_report_meminfo(struct seq_file *m);
|
|
enum pg_level {
|
PG_LEVEL_NONE,
|
PG_LEVEL_4K,
|
PG_LEVEL_2M,
|
PG_LEVEL_1G,
|
PG_LEVEL_512G,
|
PG_LEVEL_NUM
|
};
|
|
#ifdef CONFIG_PROC_FS
|
extern void update_page_count(int level, unsigned long pages);
|
#else
|
static inline void update_page_count(int level, unsigned long pages) { }
|
#endif
|
|
/*
|
* Helper function that returns the kernel pagetable entry controlling
|
* the virtual address 'address'. NULL means no pagetable entry present.
|
* NOTE: the return type is pte_t but if the pmd is PSE then we return it
|
* as a pte too.
|
*/
|
extern pte_t *lookup_address(unsigned long address, unsigned int *level);
|
extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
|
unsigned int *level);
|
|
struct mm_struct;
|
extern pte_t *lookup_address_in_mm(struct mm_struct *mm, unsigned long address,
|
unsigned int *level);
|
extern pmd_t *lookup_pmd_address(unsigned long address);
|
extern phys_addr_t slow_virt_to_phys(void *__address);
|
extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn,
|
unsigned long address,
|
unsigned numpages,
|
unsigned long page_flags);
|
extern int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address,
|
unsigned long numpages);
|
#endif /* !__ASSEMBLY__ */
|
|
#endif /* _ASM_X86_PGTABLE_DEFS_H */
|
