/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_PARAVIRT_TYPES_H
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#define _ASM_X86_PARAVIRT_TYPES_H
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/* Bitmask of what can be clobbered: usually at least eax. */
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#define CLBR_NONE 0
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#define CLBR_EAX (1 << 0)
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#define CLBR_ECX (1 << 1)
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#define CLBR_EDX (1 << 2)
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#define CLBR_EDI (1 << 3)
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#ifdef CONFIG_X86_32
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/* CLBR_ANY should match all regs platform has. For i386, that's just it */
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#define CLBR_ANY ((1 << 4) - 1)
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#define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
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#define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
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#define CLBR_SCRATCH (0)
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#else
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#define CLBR_RAX CLBR_EAX
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#define CLBR_RCX CLBR_ECX
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#define CLBR_RDX CLBR_EDX
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#define CLBR_RDI CLBR_EDI
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#define CLBR_RSI (1 << 4)
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#define CLBR_R8 (1 << 5)
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#define CLBR_R9 (1 << 6)
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#define CLBR_R10 (1 << 7)
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#define CLBR_R11 (1 << 8)
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#define CLBR_ANY ((1 << 9) - 1)
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#define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
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CLBR_RCX | CLBR_R8 | CLBR_R9)
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#define CLBR_RET_REG (CLBR_RAX)
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#define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
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#endif /* X86_64 */
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#define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
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#ifndef __ASSEMBLY__
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#include <asm/desc_defs.h>
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#include <asm/kmap_types.h>
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#include <asm/pgtable_types.h>
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#include <asm/nospec-branch.h>
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struct page;
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struct thread_struct;
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struct desc_ptr;
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struct tss_struct;
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struct mm_struct;
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struct desc_struct;
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struct task_struct;
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struct cpumask;
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struct flush_tlb_info;
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struct mmu_gather;
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struct vm_area_struct;
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/*
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* Wrapper type for pointers to code which uses the non-standard
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* calling convention. See PV_CALL_SAVE_REGS_THUNK below.
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*/
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struct paravirt_callee_save {
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void *func;
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};
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/* general info */
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struct pv_info {
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#ifdef CONFIG_PARAVIRT_XXL
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u16 extra_user_64bit_cs; /* __USER_CS if none */
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#endif
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const char *name;
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};
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struct pv_init_ops {
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/*
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* Patch may replace one of the defined code sequences with
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* arbitrary code, subject to the same register constraints.
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* This generally means the code is not free to clobber any
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* registers other than EAX. The patch function should return
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* the number of bytes of code generated, as we nop pad the
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* rest in generic code.
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*/
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unsigned (*patch)(u8 type, void *insn_buff,
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unsigned long addr, unsigned len);
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} __no_randomize_layout;
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#ifdef CONFIG_PARAVIRT_XXL
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struct pv_lazy_ops {
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/* Set deferred update mode, used for batching operations. */
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void (*enter)(void);
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void (*leave)(void);
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void (*flush)(void);
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} __no_randomize_layout;
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#endif
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struct pv_time_ops {
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unsigned long long (*sched_clock)(void);
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unsigned long long (*steal_clock)(int cpu);
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} __no_randomize_layout;
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struct pv_cpu_ops {
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/* hooks for various privileged instructions */
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void (*io_delay)(void);
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#ifdef CONFIG_PARAVIRT_XXL
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unsigned long (*get_debugreg)(int regno);
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void (*set_debugreg)(int regno, unsigned long value);
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unsigned long (*read_cr0)(void);
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void (*write_cr0)(unsigned long);
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void (*write_cr4)(unsigned long);
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/* Segment descriptor handling */
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void (*load_tr_desc)(void);
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void (*load_gdt)(const struct desc_ptr *);
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void (*load_idt)(const struct desc_ptr *);
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void (*set_ldt)(const void *desc, unsigned entries);
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unsigned long (*store_tr)(void);
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void (*load_tls)(struct thread_struct *t, unsigned int cpu);
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void (*load_gs_index)(unsigned int idx);
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void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
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const void *desc);
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void (*write_gdt_entry)(struct desc_struct *,
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int entrynum, const void *desc, int size);
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void (*write_idt_entry)(gate_desc *,
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int entrynum, const gate_desc *gate);
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void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
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void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
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void (*load_sp0)(unsigned long sp0);
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#ifdef CONFIG_X86_IOPL_IOPERM
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void (*invalidate_io_bitmap)(void);
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void (*update_io_bitmap)(void);
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#endif
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void (*wbinvd)(void);
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/* cpuid emulation, mostly so that caps bits can be disabled */
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void (*cpuid)(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx);
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/* Unsafe MSR operations. These will warn or panic on failure. */
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u64 (*read_msr)(unsigned int msr);
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void (*write_msr)(unsigned int msr, unsigned low, unsigned high);
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/*
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* Safe MSR operations.
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* read sets err to 0 or -EIO. write returns 0 or -EIO.
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*/
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u64 (*read_msr_safe)(unsigned int msr, int *err);
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int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high);
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u64 (*read_pmc)(int counter);
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/*
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* Switch to usermode gs and return to 64-bit usermode using
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* sysret. Only used in 64-bit kernels to return to 64-bit
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* processes. Usermode register state, including %rsp, must
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* already be restored.
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*/
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void (*usergs_sysret64)(void);
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/* Normal iret. Jump to this with the standard iret stack
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frame set up. */
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void (*iret)(void);
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void (*start_context_switch)(struct task_struct *prev);
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void (*end_context_switch)(struct task_struct *next);
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#endif
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} __no_randomize_layout;
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struct pv_irq_ops {
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#ifdef CONFIG_PARAVIRT_XXL
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/*
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* Get/set interrupt state. save_fl and restore_fl are only
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* expected to use X86_EFLAGS_IF; all other bits
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* returned from save_fl are undefined, and may be ignored by
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* restore_fl.
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*
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* NOTE: These functions callers expect the callee to preserve
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* more registers than the standard C calling convention.
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*/
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struct paravirt_callee_save save_fl;
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struct paravirt_callee_save restore_fl;
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struct paravirt_callee_save irq_disable;
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struct paravirt_callee_save irq_enable;
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void (*safe_halt)(void);
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void (*halt)(void);
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#endif
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} __no_randomize_layout;
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struct pv_mmu_ops {
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/* TLB operations */
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void (*flush_tlb_user)(void);
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void (*flush_tlb_kernel)(void);
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void (*flush_tlb_one_user)(unsigned long addr);
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void (*flush_tlb_others)(const struct cpumask *cpus,
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const struct flush_tlb_info *info);
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void (*tlb_remove_table)(struct mmu_gather *tlb, void *table);
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/* Hook for intercepting the destruction of an mm_struct. */
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void (*exit_mmap)(struct mm_struct *mm);
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#ifdef CONFIG_PARAVIRT_XXL
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struct paravirt_callee_save read_cr2;
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void (*write_cr2)(unsigned long);
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unsigned long (*read_cr3)(void);
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void (*write_cr3)(unsigned long);
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/* Hooks for intercepting the creation/use of an mm_struct. */
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void (*activate_mm)(struct mm_struct *prev,
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struct mm_struct *next);
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void (*dup_mmap)(struct mm_struct *oldmm,
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struct mm_struct *mm);
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/* Hooks for allocating and freeing a pagetable top-level */
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int (*pgd_alloc)(struct mm_struct *mm);
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void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
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/*
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* Hooks for allocating/releasing pagetable pages when they're
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* attached to a pagetable
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*/
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void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
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void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
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void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
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void (*alloc_p4d)(struct mm_struct *mm, unsigned long pfn);
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void (*release_pte)(unsigned long pfn);
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void (*release_pmd)(unsigned long pfn);
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void (*release_pud)(unsigned long pfn);
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void (*release_p4d)(unsigned long pfn);
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/* Pagetable manipulation functions */
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void (*set_pte)(pte_t *ptep, pte_t pteval);
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void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
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pte_t (*ptep_modify_prot_start)(struct vm_area_struct *vma, unsigned long addr,
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pte_t *ptep);
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void (*ptep_modify_prot_commit)(struct vm_area_struct *vma, unsigned long addr,
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pte_t *ptep, pte_t pte);
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struct paravirt_callee_save pte_val;
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struct paravirt_callee_save make_pte;
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struct paravirt_callee_save pgd_val;
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struct paravirt_callee_save make_pgd;
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void (*set_pud)(pud_t *pudp, pud_t pudval);
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struct paravirt_callee_save pmd_val;
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struct paravirt_callee_save make_pmd;
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struct paravirt_callee_save pud_val;
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struct paravirt_callee_save make_pud;
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void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval);
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#if CONFIG_PGTABLE_LEVELS >= 5
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struct paravirt_callee_save p4d_val;
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struct paravirt_callee_save make_p4d;
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void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval);
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#endif /* CONFIG_PGTABLE_LEVELS >= 5 */
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struct pv_lazy_ops lazy_mode;
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/* dom0 ops */
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/* Sometimes the physical address is a pfn, and sometimes its
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an mfn. We can tell which is which from the index. */
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void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
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phys_addr_t phys, pgprot_t flags);
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#endif
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} __no_randomize_layout;
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struct arch_spinlock;
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#ifdef CONFIG_SMP
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#include <asm/spinlock_types.h>
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#endif
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struct qspinlock;
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struct pv_lock_ops {
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void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val);
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struct paravirt_callee_save queued_spin_unlock;
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void (*wait)(u8 *ptr, u8 val);
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void (*kick)(int cpu);
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struct paravirt_callee_save vcpu_is_preempted;
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} __no_randomize_layout;
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/* This contains all the paravirt structures: we get a convenient
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* number for each function using the offset which we use to indicate
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* what to patch. */
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struct paravirt_patch_template {
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struct pv_init_ops init;
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struct pv_time_ops time;
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struct pv_cpu_ops cpu;
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struct pv_irq_ops irq;
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struct pv_mmu_ops mmu;
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struct pv_lock_ops lock;
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} __no_randomize_layout;
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extern struct pv_info pv_info;
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extern struct paravirt_patch_template pv_ops;
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#define PARAVIRT_PATCH(x) \
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(offsetof(struct paravirt_patch_template, x) / sizeof(void *))
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#define paravirt_type(op) \
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[paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
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[paravirt_opptr] "i" (&(pv_ops.op))
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#define paravirt_clobber(clobber) \
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[paravirt_clobber] "i" (clobber)
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/*
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* Generate some code, and mark it as patchable by the
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* apply_paravirt() alternate instruction patcher.
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*/
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#define _paravirt_alt(insn_string, type, clobber) \
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"771:\n\t" insn_string "\n" "772:\n" \
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".pushsection .parainstructions,\"a\"\n" \
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_ASM_ALIGN "\n" \
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_ASM_PTR " 771b\n" \
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" .byte " type "\n" \
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" .byte 772b-771b\n" \
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" .short " clobber "\n" \
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".popsection\n"
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/* Generate patchable code, with the default asm parameters. */
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#define paravirt_alt(insn_string) \
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_paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
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/* Simple instruction patching code. */
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#define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t"
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unsigned paravirt_patch_ident_64(void *insn_buff, unsigned len);
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unsigned paravirt_patch_default(u8 type, void *insn_buff, unsigned long addr, unsigned len);
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unsigned paravirt_patch_insns(void *insn_buff, unsigned len, const char *start, const char *end);
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unsigned native_patch(u8 type, void *insn_buff, unsigned long addr, unsigned len);
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int paravirt_disable_iospace(void);
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/*
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* This generates an indirect call based on the operation type number.
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* The type number, computed in PARAVIRT_PATCH, is derived from the
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* offset into the paravirt_patch_template structure, and can therefore be
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* freely converted back into a structure offset.
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*/
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#define PARAVIRT_CALL \
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ANNOTATE_RETPOLINE_SAFE \
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"call *%c[paravirt_opptr];"
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/*
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* These macros are intended to wrap calls through one of the paravirt
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* ops structs, so that they can be later identified and patched at
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* runtime.
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*
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* Normally, a call to a pv_op function is a simple indirect call:
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* (pv_op_struct.operations)(args...).
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*
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* Unfortunately, this is a relatively slow operation for modern CPUs,
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* because it cannot necessarily determine what the destination
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* address is. In this case, the address is a runtime constant, so at
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* the very least we can patch the call to e a simple direct call, or
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* ideally, patch an inline implementation into the callsite. (Direct
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* calls are essentially free, because the call and return addresses
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* are completely predictable.)
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*
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* For i386, these macros rely on the standard gcc "regparm(3)" calling
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* convention, in which the first three arguments are placed in %eax,
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* %edx, %ecx (in that order), and the remaining arguments are placed
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* on the stack. All caller-save registers (eax,edx,ecx) are expected
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* to be modified (either clobbered or used for return values).
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* X86_64, on the other hand, already specifies a register-based calling
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* conventions, returning at %rax, with parameteres going on %rdi, %rsi,
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* %rdx, and %rcx. Note that for this reason, x86_64 does not need any
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* special handling for dealing with 4 arguments, unlike i386.
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* However, x86_64 also have to clobber all caller saved registers, which
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* unfortunately, are quite a bit (r8 - r11)
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*
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* The call instruction itself is marked by placing its start address
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* and size into the .parainstructions section, so that
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* apply_paravirt() in arch/i386/kernel/alternative.c can do the
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* appropriate patching under the control of the backend pv_init_ops
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* implementation.
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*
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* Unfortunately there's no way to get gcc to generate the args setup
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* for the call, and then allow the call itself to be generated by an
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* inline asm. Because of this, we must do the complete arg setup and
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* return value handling from within these macros. This is fairly
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* cumbersome.
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*
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* There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
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* It could be extended to more arguments, but there would be little
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* to be gained from that. For each number of arguments, there are
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* the two VCALL and CALL variants for void and non-void functions.
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*
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* When there is a return value, the invoker of the macro must specify
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* the return type. The macro then uses sizeof() on that type to
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* determine whether its a 32 or 64 bit value, and places the return
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* in the right register(s) (just %eax for 32-bit, and %edx:%eax for
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* 64-bit). For x86_64 machines, it just returns at %rax regardless of
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* the return value size.
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*
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* 64-bit arguments are passed as a pair of adjacent 32-bit arguments
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* i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
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* in low,high order
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*
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* Small structures are passed and returned in registers. The macro
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* calling convention can't directly deal with this, so the wrapper
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* functions must do this.
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*
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* These PVOP_* macros are only defined within this header. This
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* means that all uses must be wrapped in inline functions. This also
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* makes sure the incoming and outgoing types are always correct.
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*/
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#ifdef CONFIG_X86_32
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#define PVOP_VCALL_ARGS \
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unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx;
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#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
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#define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
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#define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
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#define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
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#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
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"=c" (__ecx)
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#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
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#define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
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#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
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#define EXTRA_CLOBBERS
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#define VEXTRA_CLOBBERS
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#else /* CONFIG_X86_64 */
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/* [re]ax isn't an arg, but the return val */
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#define PVOP_VCALL_ARGS \
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unsigned long __edi = __edi, __esi = __esi, \
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__edx = __edx, __ecx = __ecx, __eax = __eax;
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#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
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#define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
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#define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
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#define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
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#define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
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#define PVOP_VCALL_CLOBBERS "=D" (__edi), \
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"=S" (__esi), "=d" (__edx), \
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"=c" (__ecx)
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#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
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/* void functions are still allowed [re]ax for scratch */
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#define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
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#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
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#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
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#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
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#endif /* CONFIG_X86_32 */
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#ifdef CONFIG_PARAVIRT_DEBUG
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#define PVOP_TEST_NULL(op) BUG_ON(pv_ops.op == NULL)
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#else
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#define PVOP_TEST_NULL(op) ((void)pv_ops.op)
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#endif
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#define PVOP_RETMASK(rettype) \
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({ unsigned long __mask = ~0UL; \
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switch (sizeof(rettype)) { \
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case 1: __mask = 0xffUL; break; \
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case 2: __mask = 0xffffUL; break; \
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case 4: __mask = 0xffffffffUL; break; \
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default: break; \
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} \
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__mask; \
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})
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#define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
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pre, post, ...) \
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({ \
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rettype __ret; \
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PVOP_CALL_ARGS; \
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PVOP_TEST_NULL(op); \
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/* This is 32-bit specific, but is okay in 64-bit */ \
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/* since this condition will never hold */ \
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if (sizeof(rettype) > sizeof(unsigned long)) { \
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asm volatile(pre \
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paravirt_alt(PARAVIRT_CALL) \
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post \
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: call_clbr, ASM_CALL_CONSTRAINT \
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: paravirt_type(op), \
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paravirt_clobber(clbr), \
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##__VA_ARGS__ \
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: "memory", "cc" extra_clbr); \
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__ret = (rettype)((((u64)__edx) << 32) | __eax); \
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} else { \
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asm volatile(pre \
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paravirt_alt(PARAVIRT_CALL) \
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post \
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: call_clbr, ASM_CALL_CONSTRAINT \
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: paravirt_type(op), \
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paravirt_clobber(clbr), \
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##__VA_ARGS__ \
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: "memory", "cc" extra_clbr); \
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__ret = (rettype)(__eax & PVOP_RETMASK(rettype)); \
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} \
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__ret; \
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})
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#define __PVOP_CALL(rettype, op, pre, post, ...) \
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____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
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EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
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#define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
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____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
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PVOP_CALLEE_CLOBBERS, , \
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pre, post, ##__VA_ARGS__)
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#define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
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({ \
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PVOP_VCALL_ARGS; \
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PVOP_TEST_NULL(op); \
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asm volatile(pre \
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paravirt_alt(PARAVIRT_CALL) \
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post \
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: call_clbr, ASM_CALL_CONSTRAINT \
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: paravirt_type(op), \
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paravirt_clobber(clbr), \
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##__VA_ARGS__ \
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: "memory", "cc" extra_clbr); \
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})
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#define __PVOP_VCALL(op, pre, post, ...) \
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____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
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VEXTRA_CLOBBERS, \
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pre, post, ##__VA_ARGS__)
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|
#define __PVOP_VCALLEESAVE(op, pre, post, ...) \
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____PVOP_VCALL(op.func, CLBR_RET_REG, \
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PVOP_VCALLEE_CLOBBERS, , \
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pre, post, ##__VA_ARGS__)
|
|
|
|
#define PVOP_CALL0(rettype, op) \
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__PVOP_CALL(rettype, op, "", "")
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#define PVOP_VCALL0(op) \
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__PVOP_VCALL(op, "", "")
|
|
#define PVOP_CALLEE0(rettype, op) \
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__PVOP_CALLEESAVE(rettype, op, "", "")
|
#define PVOP_VCALLEE0(op) \
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__PVOP_VCALLEESAVE(op, "", "")
|
|
|
#define PVOP_CALL1(rettype, op, arg1) \
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__PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
|
#define PVOP_VCALL1(op, arg1) \
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__PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
|
|
#define PVOP_CALLEE1(rettype, op, arg1) \
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__PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
|
#define PVOP_VCALLEE1(op, arg1) \
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__PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
|
|
|
#define PVOP_CALL2(rettype, op, arg1, arg2) \
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__PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
|
PVOP_CALL_ARG2(arg2))
|
#define PVOP_VCALL2(op, arg1, arg2) \
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__PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
|
PVOP_CALL_ARG2(arg2))
|
|
#define PVOP_CALLEE2(rettype, op, arg1, arg2) \
|
__PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
|
PVOP_CALL_ARG2(arg2))
|
#define PVOP_VCALLEE2(op, arg1, arg2) \
|
__PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
|
PVOP_CALL_ARG2(arg2))
|
|
|
#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
|
__PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
|
PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
|
#define PVOP_VCALL3(op, arg1, arg2, arg3) \
|
__PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
|
PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
|
|
/* This is the only difference in x86_64. We can make it much simpler */
|
#ifdef CONFIG_X86_32
|
#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
|
__PVOP_CALL(rettype, op, \
|
"push %[_arg4];", "lea 4(%%esp),%%esp;", \
|
PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
|
PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
|
#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
|
__PVOP_VCALL(op, \
|
"push %[_arg4];", "lea 4(%%esp),%%esp;", \
|
"0" ((u32)(arg1)), "1" ((u32)(arg2)), \
|
"2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
|
#else
|
#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
|
__PVOP_CALL(rettype, op, "", "", \
|
PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
|
PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
|
#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
|
__PVOP_VCALL(op, "", "", \
|
PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
|
PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
|
#endif
|
|
/* Lazy mode for batching updates / context switch */
|
enum paravirt_lazy_mode {
|
PARAVIRT_LAZY_NONE,
|
PARAVIRT_LAZY_MMU,
|
PARAVIRT_LAZY_CPU,
|
};
|
|
enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
|
void paravirt_start_context_switch(struct task_struct *prev);
|
void paravirt_end_context_switch(struct task_struct *next);
|
|
void paravirt_enter_lazy_mmu(void);
|
void paravirt_leave_lazy_mmu(void);
|
void paravirt_flush_lazy_mmu(void);
|
|
void _paravirt_nop(void);
|
u64 _paravirt_ident_64(u64);
|
|
#define paravirt_nop ((void *)_paravirt_nop)
|
|
/* These all sit in the .parainstructions section to tell us what to patch. */
|
struct paravirt_patch_site {
|
u8 *instr; /* original instructions */
|
u8 type; /* type of this instruction */
|
u8 len; /* length of original instruction */
|
};
|
|
extern struct paravirt_patch_site __parainstructions[],
|
__parainstructions_end[];
|
|
#endif /* __ASSEMBLY__ */
|
|
#endif /* _ASM_X86_PARAVIRT_TYPES_H */
|
