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| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
| %YAML 1.2
| ---
| $id: http://devicetree.org/schemas/memory-controllers/fsl/mmdc.yaml#
| $schema: http://devicetree.org/meta-schemas/core.yaml#
|
| title: Freescale Multi Mode DDR controller (MMDC)
|
| maintainers:
| - Anson Huang <Anson.Huang@nxp.com>
|
| properties:
| compatible:
| oneOf:
| - const: fsl,imx6q-mmdc
| - items:
| - enum:
| - fsl,imx6qp-mmdc
| - fsl,imx6sl-mmdc
| - fsl,imx6sll-mmdc
| - fsl,imx6sx-mmdc
| - fsl,imx6ul-mmdc
| - fsl,imx7ulp-mmdc
| - const: fsl,imx6q-mmdc
|
| reg:
| maxItems: 1
|
| clocks:
| maxItems: 1
|
| required:
| - compatible
| - reg
|
| additionalProperties: false
|
| examples:
| - |
| #include <dt-bindings/clock/imx6qdl-clock.h>
|
| memory-controller@21b0000 {
| compatible = "fsl,imx6q-mmdc";
| reg = <0x021b0000 0x4000>;
| clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
| };
|
| memory-controller@21b4000 {
| compatible = "fsl,imx6q-mmdc";
| reg = <0x021b4000 0x4000>;
| };
|
|
