* Hisilicon Hi6220 Clock Controller
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Clock control registers reside in different Hi6220 system controllers,
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please refer the following document to know more about the binding rules
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for these system controllers:
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Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
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Required Properties:
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- compatible: the compatible should be one of the following strings to
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indicate the clock controller functionality.
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- "hisilicon,hi6220-acpu-sctrl"
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- "hisilicon,hi6220-aoctrl"
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- "hisilicon,hi6220-sysctrl"
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- "hisilicon,hi6220-mediactrl"
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- "hisilicon,hi6220-pmctrl"
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- "hisilicon,hi6220-stub-clk"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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Optional Properties:
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- hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram;
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the driver need use the sram to pass parameters for frequency change.
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- mboxes: use the label reference for the mailbox as the first parameter, the
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second parameter is the channel number.
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Example 1:
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sys_ctrl: sys_ctrl@f7030000 {
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compatible = "hisilicon,hi6220-sysctrl", "syscon";
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reg = <0x0 0xf7030000 0x0 0x2000>;
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#clock-cells = <1>;
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};
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Example 2:
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stub_clock: stub_clock {
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compatible = "hisilicon,hi6220-stub-clk";
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hisilicon,hi6220-clk-sram = <&sram>;
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#clock-cells = <1>;
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mboxes = <&mailbox 1>;
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};
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/hi6220-clock.h>.
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