/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Intel Smart Sound Technology
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*
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* Copyright (C) 2013, Intel Corporation. All rights reserved.
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*/
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#ifndef __SOUND_SOC_SST_DSP_PRIV_H
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#define __SOUND_SOC_SST_DSP_PRIV_H
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/firmware.h>
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#include "../skylake/skl-sst-dsp.h"
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/*
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* DSP Operations exported by platform Audio DSP driver.
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*/
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struct sst_ops {
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/* Shim IO */
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void (*write)(void __iomem *addr, u32 offset, u32 value);
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u32 (*read)(void __iomem *addr, u32 offset);
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/* IRQ handlers */
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irqreturn_t (*irq_handler)(int irq, void *context);
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/* SST init and free */
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int (*init)(struct sst_dsp *sst);
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void (*free)(struct sst_dsp *sst);
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};
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/*
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* Audio DSP memory offsets and addresses.
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*/
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struct sst_addr {
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u32 sram0_base;
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u32 sram1_base;
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u32 w0_stat_sz;
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u32 w0_up_sz;
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void __iomem *lpe;
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void __iomem *shim;
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};
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/*
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* Audio DSP Mailbox configuration.
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*/
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struct sst_mailbox {
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void __iomem *in_base;
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void __iomem *out_base;
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size_t in_size;
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size_t out_size;
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};
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/*
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* Generic SST Shim Interface.
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*/
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struct sst_dsp {
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/* Shared for all platforms */
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/* runtime */
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struct sst_dsp_device *sst_dev;
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spinlock_t spinlock; /* IPC locking */
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struct mutex mutex; /* DSP FW lock */
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struct device *dev;
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void *thread_context;
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int irq;
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u32 id;
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/* operations */
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struct sst_ops *ops;
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/* debug FS */
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struct dentry *debugfs_root;
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/* base addresses */
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struct sst_addr addr;
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/* mailbox */
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struct sst_mailbox mailbox;
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/* SST FW files loaded and their modules */
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struct list_head module_list;
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/* SKL data */
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const char *fw_name;
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/* To allocate CL dma buffers */
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struct skl_dsp_loader_ops dsp_ops;
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struct skl_dsp_fw_ops fw_ops;
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int sst_state;
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struct skl_cl_dev cl_dev;
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u32 intr_status;
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const struct firmware *fw;
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struct snd_dma_buffer dmab;
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};
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#endif
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