/* SPDX-License-Identifier: GPL-2.0+ */
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#ifndef __AW_DEVICE_H__
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#define __AW_DEVICE_H__
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#include <linux/version.h>
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#include <linux/kernel.h>
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#include <sound/control.h>
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#include <sound/soc.h>
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#include "aw_acf_bin.h"
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#define AW87XXX_PID_9B_PRODUCT_MAX (1)
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#define AW87XXX_PID_39_PRODUCT_MAX (3)
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#define AW87XXX_PID_59_3X9_PRODUCT_MAX (2)
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#define AW87XXX_PID_59_5X9_PRODUCT_MAX (4)
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#define AW87XXX_PID_5A_PRODUCT_MAX (5)
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#define AW87XXX_PID_76_PROFUCT_MAX (3)
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#define AW_PRODUCT_NAME_LEN (8)
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#define AW_GPIO_HIGHT_LEVEL (1)
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#define AW_GPIO_LOW_LEVEL (0)
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#define AW_I2C_RETRIES (5)
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#define AW_I2C_RETRY_DELAY (2)
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#define AW_I2C_READ_MSG_NUM (2)
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#define AW_READ_CHIPID_RETRIES (5)
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#define AW_READ_CHIPID_RETRY_DELAY (2)
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#define AW_DEV_REG_CHIPID (0x00)
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#define AW_DEV_REG_INVALID_MASK (0xff)
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#define AW_NO_RESET_GPIO (-1)
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#define AW_PID_9B_BIN_REG_CFG_COUNT (10)
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/********************************************
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*
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* aw87xxx devices attributes
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*
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*******************************************/
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struct aw_device;
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struct aw_device_ops {
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int (*pwr_on_func)(struct aw_device *aw_dev, struct aw_data_container *data);
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int (*pwr_off_func)(struct aw_device *aw_dev, struct aw_data_container *data);
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};
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enum aw_dev_chipid {
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AW_DEV_CHIPID_18 = 0x18,
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AW_DEV_CHIPID_39 = 0x39,
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AW_DEV_CHIPID_59 = 0x59,
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AW_DEV_CHIPID_69 = 0x69,
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AW_DEV_CHIPID_5A = 0x5A,
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AW_DEV_CHIPID_9A = 0x9A,
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AW_DEV_CHIPID_9B = 0x9B,
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AW_DEV_CHIPID_76 = 0x76,
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};
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enum aw_dev_hw_status {
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AW_DEV_HWEN_OFF = 0,
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AW_DEV_HWEN_ON,
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AW_DEV_HWEN_INVALID,
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AW_DEV_HWEN_STATUS_MAX,
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};
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enum aw_dev_soft_off_enable {
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AW_DEV_SOFT_OFF_DISENABLE = 0,
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AW_DEV_SOFT_OFF_ENABLE = 1,
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};
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enum aw_dev_soft_rst_enable {
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AW_DEV_SOFT_RST_DISENABLE = 0,
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AW_DEV_SOFT_RST_ENABLE = 1,
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};
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enum aw_reg_receiver_mode {
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AW_NOT_REC_MODE = 0,
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AW_IS_REC_MODE = 1,
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};
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struct aw_mute_desc {
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uint8_t addr;
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uint8_t enable;
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uint8_t disable;
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uint16_t mask;
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};
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struct aw_soft_rst_desc {
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int len;
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unsigned char *access;
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};
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struct aw_esd_check_desc {
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uint8_t first_update_reg_addr;
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uint8_t first_update_reg_val;
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};
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struct aw_rec_mode_desc {
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uint8_t addr;
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uint8_t enable;
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uint8_t disable;
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uint8_t mask;
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};
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struct aw_device {
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uint8_t i2c_addr;
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uint8_t chipid;
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uint8_t soft_rst_enable;
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uint8_t soft_off_enable;
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uint8_t is_rec_mode;
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int hwen_status;
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int i2c_bus;
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int rst_gpio;
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int rst_shared_gpio;
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int reg_max_addr;
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int product_cnt;
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const char **product_tab;
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const unsigned char *reg_access;
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struct device *dev;
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struct i2c_client *i2c;
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struct aw_mute_desc mute_desc;
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struct aw_soft_rst_desc soft_rst_desc;
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struct aw_esd_check_desc esd_desc;
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struct aw_rec_mode_desc rec_desc;
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struct aw_device_ops ops;
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};
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int aw_dev_i2c_write_byte(struct aw_device *aw_dev,
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uint8_t reg_addr, uint8_t reg_data);
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int aw_dev_i2c_read_byte(struct aw_device *aw_dev,
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uint8_t reg_addr, uint8_t *reg_data);
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int aw_dev_i2c_read_msg(struct aw_device *aw_dev,
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uint8_t reg_addr, uint8_t *data_buf, uint32_t data_len);
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int aw_dev_i2c_write_bits(struct aw_device *aw_dev,
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uint8_t reg_addr, uint8_t mask, uint8_t reg_data);
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void aw_dev_soft_reset(struct aw_device *aw_dev);
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void aw_dev_hw_pwr_ctrl(struct aw_device *aw_dev, bool enable);
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int aw_dev_default_profile_check(struct aw_device *aw_dev,
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int profile, struct aw_data_container *profile_data);
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int aw_dev_default_pwr_on(struct aw_device *aw_dev,
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struct aw_data_container *profile_data);
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int aw_dev_default_pwr_off(struct aw_device *aw_dev,
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struct aw_data_container *profile_data);
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int aw_dev_esd_reg_status_check(struct aw_device *aw_dev);
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int aw_dev_check_reg_is_rec_mode(struct aw_device *aw_dev);
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int aw_dev_init(struct aw_device *aw_dev);
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#endif
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