forked from ~ljy/RK3588_XEN
| commit | author | age | ||
| a07526 | 1 | /* Please get help from ddrbin_tool_user_guide.txt and './ddrbin_tool -h' */ |
| H | 2 | start tag=0x12345678 |
| 3 | ddr2_freq= | |
| 4 | lp2_freq= | |
| 5 | ddr3_freq= | |
| 6 | lp3_freq= | |
| 7 | ddr4_freq= | |
| 8 | lp4_freq= | |
| 9 | lp4x_freq= | |
| 10 | lp5_freq= | |
| 11 | ||
| 12 | uart id= | |
| 13 | uart iomux= | |
| 14 | uart baudrate= | |
| 15 | ||
| 16 | sr_idle= | |
| 17 | pd_idle= | |
| 18 | ||
| 19 | first scan channel= | |
| 20 | channel mask= | |
| 21 | stride type= | |
| 22 | standby_idle= | |
| 23 | ||
| 24 | ext_temp_ref= | |
| 25 | link_ecc_en= | |
| 26 | per_bank_ref_en= | |
| 27 | derate_en= | |
| 28 | auto_precharge_en= | |
| 29 | ||
| 30 | res_space_remap_all= | |
| 31 | res_space_remap_portion= | |
| 32 | ||
| 33 | rd_vref_scan_en= | |
| 34 | wr_vref_scan_en= | |
| 35 | eye_2d_scan_en= | |
| 36 | ||
| 37 | dis_train_print= | |
| 38 | ||
| 39 | ssmod_downspread= | |
| 40 | ssmod_div= | |
| 41 | ssmod_spread= | |
| 42 | ||
| 43 | ddr_2t= | |
| 44 | ||
| 45 | pstore_base_addr= | |
| 46 | pstore_buf_size= | |
| 47 | uboot_log_en= | |
| 48 | atf_log_en= | |
| 49 | optee_log_en= | |
| 50 | spl_log_en= | |
| 51 | tpl_log_en= | |
| 52 | ||
| 53 | first_init_dram_type= | |
| 54 | dfs_disable= | |
| 55 | pageclose= | |
| 56 | boot_fsp= | |
| 57 | ||
| 58 | ddr2_f1_freq_mhz= | |
| 59 | ddr2_f2_freq_mhz= | |
| 60 | ddr2_f3_freq_mhz= | |
| 61 | ddr2_f4_freq_mhz= | |
| 62 | ddr2_f5_freq_mhz= | |
| 63 | phy_ddr2_dq_drv_when_odten_ohm= | |
| 64 | phy_ddr2_ca_drv_when_odten_ohm= | |
| 65 | phy_ddr2_clk_drv_when_odten_ohm= | |
| 66 | ddr2_dq_drv_when_odten_ohm= | |
| 67 | phy_ddr2_dq_drv_when_odtoff_ohm= | |
| 68 | phy_ddr2_ca_drv_when_odtoff_ohm= | |
| 69 | phy_ddr2_clk_drv_when_odtoff_ohm= | |
| 70 | ddr2_dq_drv_when_odtoff_ohm= | |
| 71 | phy_ddr2_odt_ohm= | |
| 72 | ddr2_odt_ohm= | |
| 73 | phy_ddr2_odt_pull_up_en= | |
| 74 | phy_ddr2_odt_pull_dn_en= | |
| 75 | phy_ddr2_odten_freq_mhz= | |
| 76 | ddr2_odten_freq_mhz= | |
| 77 | phy_ddr2_dq_sr_when_odten= | |
| 78 | phy_ddr2_ca_sr_when_odten= | |
| 79 | phy_ddr2_clk_sr_when_odten= | |
| 80 | phy_ddr2_dq_sr_when_odtoff= | |
| 81 | phy_ddr2_ca_sr_when_odtoff= | |
| 82 | phy_ddr2_clk_sr_when_odtoff= | |
| 83 | phy_ddr2_dq_vref_when_odten= | |
| 84 | ddr2_dq_vref_when_odten= | |
| 85 | ddr2_ca_vref_when_odten= | |
| 86 | phy_ddr2_dq_vref_when_odtoff= | |
| 87 | ddr2_dq_vref_when_odtoff= | |
| 88 | ddr2_ca_vref_when_odtoff= | |
| 89 | ||
| 90 | ddr3_f1_freq_mhz= | |
| 91 | ddr3_f2_freq_mhz= | |
| 92 | ddr3_f3_freq_mhz= | |
| 93 | ddr3_f4_freq_mhz= | |
| 94 | ddr3_f5_freq_mhz= | |
| 95 | phy_ddr3_dq_drv_when_odten_ohm= | |
| 96 | phy_ddr3_ca_drv_when_odten_ohm= | |
| 97 | phy_ddr3_clk_drv_when_odten_ohm= | |
| 98 | ddr3_dq_drv_when_odten_ohm= | |
| 99 | phy_ddr3_dq_drv_when_odtoff_ohm= | |
| 100 | phy_ddr3_ca_drv_when_odtoff_ohm= | |
| 101 | phy_ddr3_clk_drv_when_odtoff_ohm= | |
| 102 | ddr3_dq_drv_when_odtoff_ohm= | |
| 103 | phy_ddr3_odt_ohm= | |
| 104 | ddr3_odt_ohm= | |
| 105 | phy_ddr3_odt_pull_up_en= | |
| 106 | phy_ddr3_odt_pull_dn_en= | |
| 107 | phy_ddr3_odten_freq_mhz= | |
| 108 | ddr3_odten_freq_mhz= | |
| 109 | phy_ddr3_dq_sr_when_odten= | |
| 110 | phy_ddr3_ca_sr_when_odten= | |
| 111 | phy_ddr3_clk_sr_when_odten= | |
| 112 | phy_ddr3_dq_sr_when_odtoff= | |
| 113 | phy_ddr3_ca_sr_when_odtoff= | |
| 114 | phy_ddr3_clk_sr_when_odtoff= | |
| 115 | phy_ddr3_dq_vref_when_odten= | |
| 116 | ddr3_dq_vref_when_odten= | |
| 117 | ddr3_ca_vref_when_odten= | |
| 118 | phy_ddr3_dq_vref_when_odtoff= | |
| 119 | ddr3_dq_vref_when_odtoff= | |
| 120 | ddr3_ca_vref_when_odtoff= | |
| 121 | ||
| 122 | ddr4_f1_freq_mhz= | |
| 123 | ddr4_f2_freq_mhz= | |
| 124 | ddr4_f3_freq_mhz= | |
| 125 | ddr4_f4_freq_mhz= | |
| 126 | ddr4_f5_freq_mhz= | |
| 127 | phy_ddr4_dq_drv_when_odten_ohm= | |
| 128 | phy_ddr4_ca_drv_when_odten_ohm= | |
| 129 | phy_ddr4_clk_drv_when_odten_ohm= | |
| 130 | ddr4_dq_drv_when_odten_ohm= | |
| 131 | phy_ddr4_dq_drv_when_odtoff_ohm= | |
| 132 | phy_ddr4_ca_drv_when_odtoff_ohm= | |
| 133 | phy_ddr4_clk_drv_when_odtoff_ohm= | |
| 134 | ddr4_dq_drv_when_odtoff_ohm= | |
| 135 | phy_ddr4_odt_ohm= | |
| 136 | ddr4_odt_ohm= | |
| 137 | phy_ddr4_odt_pull_up_en= | |
| 138 | phy_ddr4_odt_pull_dn_en= | |
| 139 | phy_ddr4_odten_freq_mhz= | |
| 140 | ddr4_odten_freq_mhz= | |
| 141 | phy_ddr4_dq_sr_when_odten= | |
| 142 | phy_ddr4_ca_sr_when_odten= | |
| 143 | phy_ddr4_clk_sr_when_odten= | |
| 144 | phy_ddr4_dq_sr_when_odtoff= | |
| 145 | phy_ddr4_ca_sr_when_odtoff= | |
| 146 | phy_ddr4_clk_sr_when_odtoff= | |
| 147 | phy_ddr4_dq_vref_when_odten= | |
| 148 | ddr4_dq_vref_when_odten= | |
| 149 | ddr4_ca_vref_when_odten= | |
| 150 | phy_ddr4_dq_vref_when_odtoff= | |
| 151 | ddr4_dq_vref_when_odtoff= | |
| 152 | ddr4_ca_vref_when_odtoff= | |
| 153 | ||
| 154 | lp2_f1_freq_mhz= | |
| 155 | lp2_f2_freq_mhz= | |
| 156 | lp2_f3_freq_mhz= | |
| 157 | lp2_f4_freq_mhz= | |
| 158 | lp2_f5_freq_mhz= | |
| 159 | phy_lp2_dq_drv_when_odten_ohm= | |
| 160 | phy_lp2_ca_drv_when_odten_ohm= | |
| 161 | phy_lp2_clk_drv_when_odten_ohm= | |
| 162 | lp2_dq_drv_when_odten_ohm= | |
| 163 | phy_lp2_dq_drv_when_odtoff_ohm= | |
| 164 | phy_lp2_ca_drv_when_odtoff_ohm= | |
| 165 | phy_lp2_clk_drv_when_odtoff_ohm= | |
| 166 | lp2_dq_drv_when_odtoff_ohm= | |
| 167 | phy_lp2_odt_ohm= | |
| 168 | lp2_odt_ohm= | |
| 169 | phy_lp2_odt_pull_up_en= | |
| 170 | phy_lp2_odt_pull_dn_en= | |
| 171 | phy_lp2_odten_freq_mhz= | |
| 172 | lp2_odten_freq_mhz= | |
| 173 | phy_lp2_dq_sr_when_odten= | |
| 174 | phy_lp2_ca_sr_when_odten= | |
| 175 | phy_lp2_clk_sr_when_odten= | |
| 176 | phy_lp2_dq_sr_when_odtoff= | |
| 177 | phy_lp2_ca_sr_when_odtoff= | |
| 178 | phy_lp2_clk_sr_when_odtoff= | |
| 179 | phy_lp2_dq_vref_when_odten= | |
| 180 | lp2_dq_vref_when_odten= | |
| 181 | lp2_ca_vref_when_odten= | |
| 182 | phy_lp2_dq_vref_when_odtoff= | |
| 183 | lp2_dq_vref_when_odtoff= | |
| 184 | lp2_ca_vref_when_odtoff= | |
| 185 | ||
| 186 | lp3_f1_freq_mhz= | |
| 187 | lp3_f2_freq_mhz= | |
| 188 | lp3_f3_freq_mhz= | |
| 189 | lp3_f4_freq_mhz= | |
| 190 | lp3_f5_freq_mhz= | |
| 191 | phy_lp3_dq_drv_when_odten_ohm= | |
| 192 | phy_lp3_ca_drv_when_odten_ohm= | |
| 193 | phy_lp3_clk_drv_when_odten_ohm= | |
| 194 | lp3_dq_drv_when_odten_ohm= | |
| 195 | phy_lp3_dq_drv_when_odtoff_ohm= | |
| 196 | phy_lp3_ca_drv_when_odtoff_ohm= | |
| 197 | phy_lp3_clk_drv_when_odtoff_ohm= | |
| 198 | lp3_dq_drv_when_odtoff_ohm= | |
| 199 | phy_lp3_odt_ohm= | |
| 200 | lp3_odt_ohm= | |
| 201 | phy_lp3_odt_pull_up_en= | |
| 202 | phy_lp3_odt_pull_dn_en= | |
| 203 | phy_lp3_odten_freq_mhz= | |
| 204 | lp3_odten_freq_mhz= | |
| 205 | phy_lp3_dq_sr_when_odten= | |
| 206 | phy_lp3_ca_sr_when_odten= | |
| 207 | phy_lp3_clk_sr_when_odten= | |
| 208 | phy_lp3_dq_sr_when_odtoff= | |
| 209 | phy_lp3_ca_sr_when_odtoff= | |
| 210 | phy_lp3_clk_sr_when_odtoff= | |
| 211 | phy_lp3_dq_vref_when_odten= | |
| 212 | lp3_dq_vref_when_odten= | |
| 213 | lp3_ca_vref_when_odten= | |
| 214 | phy_lp3_dq_vref_when_odtoff= | |
| 215 | lp3_dq_vref_when_odtoff= | |
| 216 | lp3_ca_vref_when_odtoff= | |
| 217 | ||
| 218 | lp4_f1_freq_mhz= | |
| 219 | lp4_f2_freq_mhz= | |
| 220 | lp4_f3_freq_mhz= | |
| 221 | lp4_f4_freq_mhz= | |
| 222 | lp4_f5_freq_mhz= | |
| 223 | phy_lp4_dq_drv_when_odten_ohm= | |
| 224 | phy_lp4_ca_drv_when_odten_ohm= | |
| 225 | phy_lp4_clk_drv_when_odten_ohm= | |
| 226 | lp4_dq_drv_when_odten_ohm= | |
| 227 | phy_lp4_dq_drv_when_odtoff_ohm= | |
| 228 | phy_lp4_ca_drv_when_odtoff_ohm= | |
| 229 | phy_lp4_clk_drv_when_odtoff_ohm= | |
| 230 | lp4_dq_drv_when_odtoff_ohm= | |
| 231 | phy_lp4_odt_ohm= | |
| 232 | lp4_odt_ohm= | |
| 233 | lp4_ca_odt_ohm= | |
| 234 | lp4_drv_pu_cal_odten= | |
| 235 | lp4_drv_pu_cal_odtoff= | |
| 236 | phy_lp4_drv_pull_dn_en_odten= | |
| 237 | phy_lp4_drv_pull_dn_en_odtoff= | |
| 238 | phy_lp4_odten_freq_mhz= | |
| 239 | lp4_dq_odten_freq_mhz= | |
| 240 | phy_lp4_dq_sr_when_odten= | |
| 241 | phy_lp4_ca_sr_when_odten= | |
| 242 | phy_lp4_clk_sr_when_odten= | |
| 243 | phy_lp4_dq_sr_when_odtoff= | |
| 244 | phy_lp4_ca_sr_when_odtoff= | |
| 245 | phy_lp4_clk_sr_when_odtoff= | |
| 246 | lp4_ca_odten_freq_mhz= | |
| 247 | phy_lp4_cs_drv_odten= | |
| 248 | phy_lp4_cs_drv_odtoff= | |
| 249 | lp4_odte_ck= | |
| 250 | lp4_odte_cs_en= | |
| 251 | lp4_odtd_ca_en= | |
| 252 | phy_lp4_dq_vref_when_odten= | |
| 253 | lp4_dq_vref_when_odten= | |
| 254 | lp4_ca_vref_when_odten= | |
| 255 | phy_lp4_dq_vref_when_odtoff= | |
| 256 | lp4_dq_vref_when_odtoff= | |
| 257 | lp4_ca_vref_when_odtoff= | |
| 258 | ||
| 259 | ddr2_bytes_map= | |
| 260 | ddr3_bytes_map= | |
| 261 | ddr4_bytes_map= | |
| 262 | lp2_bytes_map= | |
| 263 | lp3_bytes_map= | |
| 264 | lp4_bytes_map= | |
| 265 | lp3_dq0_7_map= | |
| 266 | lp2_dq0_7_map= | |
| 267 | ddr4_cs0_dq0_dq15_map= | |
| 268 | ddr4_cs0_dq16_dq31_map= | |
| 269 | ddr4_cs1_dq0_dq15_map= | |
| 270 | ddr4_cs1_dq16_dq31_map= | |
| 271 | ||
| 272 | lp4x_f1_freq_mhz= | |
| 273 | lp4x_f2_freq_mhz= | |
| 274 | lp4x_f3_freq_mhz= | |
| 275 | lp4x_f4_freq_mhz= | |
| 276 | lp4x_f5_freq_mhz= | |
| 277 | phy_lp4x_dq_drv_when_odten_ohm= | |
| 278 | phy_lp4x_ca_drv_when_odten_ohm= | |
| 279 | phy_lp4x_clk_drv_when_odten_ohm= | |
| 280 | lp4x_dq_drv_when_odten_ohm= | |
| 281 | phy_lp4x_dq_drv_when_odtoff_ohm= | |
| 282 | phy_lp4x_ca_drv_when_odtoff_ohm= | |
| 283 | phy_lp4x_clk_drv_when_odtoff_ohm= | |
| 284 | lp4x_dq_drv_when_odtoff_ohm= | |
| 285 | phy_lp4x_odt_ohm= | |
| 286 | lp4x_odt_ohm= | |
| 287 | lp4x_ca_odt_ohm= | |
| 288 | lp4x_drv_pu_cal_odten= | |
| 289 | lp4x_drv_pu_cal_odtoff= | |
| 290 | phy_lp4x_drv_pull_dn_en_odten= | |
| 291 | phy_lp4x_drv_pull_dn_en_odtoff= | |
| 292 | phy_lp4x_odten_freq_mhz= | |
| 293 | lp4x_dq_odten_freq_mhz= | |
| 294 | phy_lp4x_dq_sr_when_odten= | |
| 295 | phy_lp4x_ca_sr_when_odten= | |
| 296 | phy_lp4x_clk_sr_when_odten= | |
| 297 | phy_lp4x_dq_sr_when_odtoff= | |
| 298 | phy_lp4x_ca_sr_when_odtoff= | |
| 299 | phy_lp4x_clk_sr_when_odtoff= | |
| 300 | lp4x_ca_odten_freq_mhz= | |
| 301 | phy_lp4x_cs_drv_odten= | |
| 302 | phy_lp4x_cs_drv_odtoff= | |
| 303 | lp4x_odte_ck= | |
| 304 | lp4x_odte_cs_en= | |
| 305 | lp4x_odtd_ca_en= | |
| 306 | phy_lp4x_dq_vref_when_odten= | |
| 307 | lp4x_dq_vref_when_odten= | |
| 308 | lp4x_ca_vref_when_odten= | |
| 309 | phy_lp4x_dq_vref_when_odtoff= | |
| 310 | lp4x_dq_vref_when_odtoff= | |
| 311 | lp4x_ca_vref_when_odtoff= | |
| 312 | ||
| 313 | lp5_f1_freq_mhz= | |
| 314 | lp5_f2_freq_mhz= | |
| 315 | lp5_f3_freq_mhz= | |
| 316 | lp5_f4_freq_mhz= | |
| 317 | lp5_f5_freq_mhz= | |
| 318 | phy_lp5_dq_drv_when_odten_ohm= | |
| 319 | phy_lp5_ca_drv_when_odten_ohm= | |
| 320 | phy_lp5_clk_drv_when_odten_ohm= | |
| 321 | lp5_dq_drv_when_odten_ohm= | |
| 322 | phy_lp5_dq_drv_when_odtoff_ohm= | |
| 323 | phy_lp5_ca_drv_when_odtoff_ohm= | |
| 324 | phy_lp5_clk_drv_when_odtoff_ohm= | |
| 325 | lp5_dq_drv_when_odtoff_ohm= | |
| 326 | phy_lp5_odt_ohm= | |
| 327 | lp5_odt_ohm= | |
| 328 | lp5_ca_odt_ohm= | |
| 329 | lp5_drv_pu_cal_odten= | |
| 330 | lp5_drv_pu_cal_odtoff= | |
| 331 | phy_lp5_drv_pull_dn_en_odten= | |
| 332 | phy_lp5_drv_pull_dn_en_odtoff= | |
| 333 | phy_lp5_odten_freq_mhz= | |
| 334 | lp5_dq_odten_freq_mhz= | |
| 335 | phy_lp5_dq_sr_when_odten= | |
| 336 | phy_lp5_ca_sr_when_odten= | |
| 337 | phy_lp5_clk_sr_when_odten= | |
| 338 | phy_lp5_dq_sr_when_odtoff= | |
| 339 | phy_lp5_ca_sr_when_odtoff= | |
| 340 | phy_lp5_clk_sr_when_odtoff= | |
| 341 | lp5_ca_odten_freq_mhz= | |
| 342 | lp5_wck_odt_en_freq= | |
| 343 | lp5_wck_odt= | |
| 344 | phy_lp5_cs_drv_odten= | |
| 345 | phy_lp5_cs_drv_odtoff= | |
| 346 | lp5_odte_ck= | |
| 347 | lp5_odte_cs_en= | |
| 348 | lp5_odtd_ca_en= | |
| 349 | lp5_nt_odt= | |
| 350 | phy_lp5_dq_vref_when_odten= | |
| 351 | lp5_dq_vref_when_odten= | |
| 352 | lp5_ca_vref_when_odten= | |
| 353 | phy_lp5_dq_vref_when_odtoff= | |
| 354 | lp5_dq_vref_when_odtoff= | |
| 355 | lp5_ca_vref_when_odtoff= | |
| 356 | ||
| 357 | ch_mask0= | |
| 358 | ch_mask1= | |
| 359 | bank_mask0= | |
| 360 | bank_mask1= | |
| 361 | bank_mask2= | |
| 362 | bank_mask3= | |
| 363 | rank_mask0= | |
| 364 | rank_mask1= | |
| 365 | ||
| 366 | ddr3_skew_freq_mhz= | |
| 367 | ddr3_ca0_skew= | |
| 368 | ddr3_ca1_skew= | |
| 369 | ddr3_ca2_skew= | |
| 370 | ddr3_ca3_skew= | |
| 371 | ddr3_ca4_skew= | |
| 372 | ddr3_ca5_skew= | |
| 373 | ddr3_ca6_skew= | |
| 374 | ddr3_ca7_skew= | |
| 375 | ddr3_ca8_skew= | |
| 376 | ddr3_ca9_skew= | |
| 377 | ddr3_ca10_skew= | |
| 378 | ddr3_ca11_skew= | |
| 379 | ddr3_ca12_skew= | |
| 380 | ddr3_ca13_skew= | |
| 381 | ddr3_ca14_skew= | |
| 382 | ddr3_ca15_skew= | |
| 383 | ddr3_ras_skew= | |
| 384 | ddr3_cas_skew= | |
| 385 | ddr3_ba0_skew= | |
| 386 | ddr3_ba1_skew= | |
| 387 | ddr3_ba2_skew= | |
| 388 | ddr3_we_skew= | |
| 389 | ddr3_cke0_skew= | |
| 390 | ddr3_cke1_skew= | |
| 391 | ddr3_ckn_skew= | |
| 392 | ddr3_ckp_skew= | |
| 393 | ddr3_odt0_skew= | |
| 394 | ddr3_odt1_skew= | |
| 395 | ddr3_cs0_skew= | |
| 396 | ddr3_cs1_skew= | |
| 397 | ddr3_resetn_skew= | |
| 398 | ||
| 399 | ddr4_skew_freq_mhz= | |
| 400 | ddr4_ca0_skew= | |
| 401 | ddr4_ca1_skew= | |
| 402 | ddr4_ca2_skew= | |
| 403 | ddr4_ca3_skew= | |
| 404 | ddr4_ca4_skew= | |
| 405 | ddr4_ca5_skew= | |
| 406 | ddr4_ca6_skew= | |
| 407 | ddr4_ca7_skew= | |
| 408 | ddr4_ca8_skew= | |
| 409 | ddr4_ca9_skew= | |
| 410 | ddr4_ca10_skew= | |
| 411 | ddr4_ca11_skew= | |
| 412 | ddr4_ca12_skew= | |
| 413 | ddr4_ca13_skew= | |
| 414 | ddr4_ca14_skew= | |
| 415 | ddr4_ca15_skew= | |
| 416 | ddr4_ca16_skew= | |
| 417 | ddr4_ca17_skew= | |
| 418 | ddr4_ba0_skew= | |
| 419 | ddr4_ba1_skew= | |
| 420 | ddr4_bg0_skew= | |
| 421 | ddr4_bg1_skew= | |
| 422 | ddr4_cke0_skew= | |
| 423 | ddr4_cke1_skew= | |
| 424 | ddr4_ckn_skew= | |
| 425 | ddr4_ckp_skew= | |
| 426 | ddr4_odt0_skew= | |
| 427 | ddr4_odt1_skew= | |
| 428 | ddr4_cs0_skew= | |
| 429 | ddr4_cs1_skew= | |
| 430 | ddr4_resetn_skew= | |
| 431 | ddr4_actn_skew= | |
| 432 | ||
| 433 | lp3_skew_freq_mhz= | |
| 434 | lp3_ca0_skew= | |
| 435 | lp3_ca1_skew= | |
| 436 | lp3_ca2_skew= | |
| 437 | lp3_ca3_skew= | |
| 438 | lp3_ca4_skew= | |
| 439 | lp3_ca5_skew= | |
| 440 | lp3_ca6_skew= | |
| 441 | lp3_ca7_skew= | |
| 442 | lp3_ca8_skew= | |
| 443 | lp3_ca9_skew= | |
| 444 | lp3_cke0_skew= | |
| 445 | lp3_cke1_skew= | |
| 446 | lp3_ckn_skew= | |
| 447 | lp3_ckp_skew= | |
| 448 | lp3_odt0_skew= | |
| 449 | lp3_odt1_skew= | |
| 450 | lp3_odt2_skew= | |
| 451 | lp3_odt3_skew= | |
| 452 | lp3_cs0_skew= | |
| 453 | lp3_cs1_skew= | |
| 454 | lp3_cs2_skew= | |
| 455 | lp3_cs3_skew= | |
| 456 | ||
| 457 | lp4_skew_freq_mhz= | |
| 458 | lp4_ca0_a_skew= | |
| 459 | lp4_ca1_a_skew= | |
| 460 | lp4_ca2_a_skew= | |
| 461 | lp4_ca3_a_skew= | |
| 462 | lp4_ca4_a_skew= | |
| 463 | lp4_ca5_a_skew= | |
| 464 | lp4_odt0_a_skew= | |
| 465 | lp4_odt1_a_skew= | |
| 466 | lp4_cke0_a_skew= | |
| 467 | lp4_cke1_a_skew= | |
| 468 | lp4_ckn_a_skew= | |
| 469 | lp4_ckp_a_skew= | |
| 470 | lp4_cs0_a_skew= | |
| 471 | lp4_cs1_a_skew= | |
| 472 | lp4_ca0_b_skew= | |
| 473 | lp4_ca1_b_skew= | |
| 474 | lp4_ca2_b_skew= | |
| 475 | lp4_ca3_b_skew= | |
| 476 | lp4_ca4_b_skew= | |
| 477 | lp4_ca5_b_skew= | |
| 478 | lp4_odt0_b_skew= | |
| 479 | lp4_odt1_b_skew= | |
| 480 | lp4_cke0_b_skew= | |
| 481 | lp4_cke1_b_skew= | |
| 482 | lp4_ckn_b_skew= | |
| 483 | lp4_ckp_b_skew= | |
| 484 | lp4_cs0_b_skew= | |
| 485 | lp4_cs1_b_skew= | |
| 486 | lp4_resetn_skew= | |
| 487 | ||
| 488 | lp5_skew_freq_mhz= | |
| 489 | lp5_ca0_a_skew= | |
| 490 | lp5_ca1_a_skew= | |
| 491 | lp5_ca2_a_skew= | |
| 492 | lp5_ca3_a_skew= | |
| 493 | lp5_ca4_a_skew= | |
| 494 | lp5_ca5_a_skew= | |
| 495 | lp5_ca6_a_skew= | |
| 496 | lp5_ckn_a_skew= | |
| 497 | lp5_ckp_a_skew= | |
| 498 | lp5_cs0_a_skew= | |
| 499 | lp5_cs1_a_skew= | |
| 500 | lp5_ca0_b_skew= | |
| 501 | lp5_ca1_b_skew= | |
| 502 | lp5_ca2_b_skew= | |
| 503 | lp5_ca3_b_skew= | |
| 504 | lp5_ca4_b_skew= | |
| 505 | lp5_ca5_b_skew= | |
| 506 | lp5_ca6_b_skew= | |
| 507 | lp5_ckn_b_skew= | |
| 508 | lp5_ckp_b_skew= | |
| 509 | lp5_cs0_b_skew= | |
| 510 | lp5_cs1_b_skew= | |
| 511 | lp5_resetn_skew= | |
| 512 | ||
| 513 | end | |
